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      1 /** @file
      2   This protocol abstracts the 8259 interrupt controller. This includes
      3   PCI IRQ routing needed to program the PCI Interrupt Line register.
      4 
      5 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
      6 This program and the accompanying materials are licensed and made available under
      7 the terms and conditions of the BSD License that accompanies this distribution.
      8 The full text of the license may be found at
      9 http://opensource.org/licenses/bsd-license.php.
     10 
     11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     13 
     14   @par Revision Reference:
     15   This protocol is defined in Framework for EFI Compatibility Support Module spec
     16   Version 0.97.
     17 
     18 **/
     19 
     20 #ifndef _EFI_LEGACY_8259_H_
     21 #define _EFI_LEGACY_8259_H_
     22 
     23 
     24 #define EFI_LEGACY_8259_PROTOCOL_GUID \
     25   { \
     26     0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
     27   }
     28 
     29 typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
     30 
     31 typedef enum {
     32   Efi8259Irq0,
     33   Efi8259Irq1,
     34   Efi8259Irq2,
     35   Efi8259Irq3,
     36   Efi8259Irq4,
     37   Efi8259Irq5,
     38   Efi8259Irq6,
     39   Efi8259Irq7,
     40   Efi8259Irq8,
     41   Efi8259Irq9,
     42   Efi8259Irq10,
     43   Efi8259Irq11,
     44   Efi8259Irq12,
     45   Efi8259Irq13,
     46   Efi8259Irq14,
     47   Efi8259Irq15,
     48   Efi8259IrqMax
     49 } EFI_8259_IRQ;
     50 
     51 typedef enum {
     52   Efi8259LegacyMode,
     53   Efi8259ProtectedMode,
     54   Efi8259MaxMode
     55 } EFI_8259_MODE;
     56 
     57 /**
     58   Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
     59   the legacy mode mask and the protected mode mask. The base address for the 8259
     60   is different for legacy and protected mode, so two masks are required.
     61 
     62   @param  This                  The protocol instance pointer.
     63   @param  MasterBase            The base vector for the Master PIC in the 8259 controller.
     64   @param  SlaveBase             The base vector for the Slave PIC in the 8259 controller.
     65 
     66   @retval EFI_SUCCESS           The new bases were programmed.
     67   @retval EFI_DEVICE_ERROR      A device error occured programming the vector bases.
     68 
     69 **/
     70 typedef
     71 EFI_STATUS
     72 (EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(
     73   IN EFI_LEGACY_8259_PROTOCOL           *This,
     74   IN  UINT8                             MasterBase,
     75   IN  UINT8                             SlaveBase
     76   );
     77 
     78 /**
     79   Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
     80   the legacy mode mask and the protected mode mask. The base address for the 8259
     81   is different for legacy and protected mode, so two masks are required.
     82 
     83   @param  This                  The protocol instance pointer.
     84   @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.
     85   @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.
     86   @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.
     87   @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.
     88 
     89   @retval EFI_SUCCESS           8259 status returned.
     90   @retval EFI_DEVICE_ERROR      Error reading 8259.
     91 
     92 **/
     93 typedef
     94 EFI_STATUS
     95 (EFIAPI *EFI_LEGACY_8259_GET_MASK)(
     96   IN EFI_LEGACY_8259_PROTOCOL           *This,
     97   OUT UINT16                            *LegacyMask, OPTIONAL
     98   OUT UINT16                            *LegacyEdgeLevel, OPTIONAL
     99   OUT UINT16                            *ProtectedMask, OPTIONAL
    100   OUT UINT16                            *ProtectedEdgeLevel OPTIONAL
    101   );
    102 
    103 /**
    104   Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
    105   the legacy mode mask and the protected mode mask. The base address for the 8259
    106   is different for legacy and protected mode, so two masks are required.
    107   Also set the edge/level masks.
    108 
    109   @param  This                  The protocol instance pointer.
    110   @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.
    111   @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.
    112   @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.
    113   @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.
    114 
    115   @retval EFI_SUCCESS           8259 status returned.
    116   @retval EFI_DEVICE_ERROR      Error writing 8259.
    117 
    118 **/
    119 typedef
    120 EFI_STATUS
    121 (EFIAPI *EFI_LEGACY_8259_SET_MASK)(
    122   IN EFI_LEGACY_8259_PROTOCOL           *This,
    123   IN  UINT16                            *LegacyMask, OPTIONAL
    124   IN  UINT16                            *LegacyEdgeLevel, OPTIONAL
    125   IN  UINT16                            *ProtectedMask, OPTIONAL
    126   IN  UINT16                            *ProtectedEdgeLevel OPTIONAL
    127   );
    128 
    129 /**
    130   Set the 8259 mode of operation. The base address for the 8259 is different for
    131   legacy and protected mode. The legacy mode requires the master 8259 to have a
    132   master base of 0x08 and the slave base of 0x70. The protected mode base locations
    133   are not defined. Interrupts must be masked by the caller before this function
    134   is called. The interrupt mask from the current mode is saved. The interrupt
    135   mask for the new mode is Mask, or if Mask does not exist the previously saved
    136   mask is used.
    137 
    138   @param  This                  The protocol instance pointer.
    139   @param  Mode                  The mode of operation. i.e. the real mode or protected mode.
    140   @param  Mask                  Optional interupt mask for the new mode.
    141   @param  EdgeLevel             Optional trigger mask for the new mode.
    142 
    143   @retval EFI_SUCCESS           8259 programmed.
    144   @retval EFI_DEVICE_ERROR      Error writing to 8259.
    145 
    146 **/
    147 typedef
    148 EFI_STATUS
    149 (EFIAPI *EFI_LEGACY_8259_SET_MODE)(
    150   IN EFI_LEGACY_8259_PROTOCOL         *This,
    151   IN  EFI_8259_MODE                   Mode,
    152   IN  UINT16                          *Mask, OPTIONAL
    153   IN  UINT16                          *EdgeLevel OPTIONAL
    154   );
    155 
    156 /**
    157   Convert from IRQ to processor interrupt vector number.
    158 
    159   @param  This                  The protocol instance pointer.
    160   @param  Irq                   8259 IRQ0 - IRQ15.
    161   @param  Vector                The processor vector number that matches an Irq.
    162 
    163   @retval EFI_SUCCESS           The Vector matching Irq is returned.
    164   @retval EFI_INVALID_PARAMETER The Irq not valid.
    165 
    166 **/
    167 typedef
    168 EFI_STATUS
    169 (EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(
    170   IN EFI_LEGACY_8259_PROTOCOL           *This,
    171   IN  EFI_8259_IRQ                      Irq,
    172   OUT UINT8                             *Vector
    173   );
    174 
    175 /**
    176   Enable Irq by unmasking interrupt in 8259
    177 
    178   @param  This                  The protocol instance pointer.
    179   @param  Irq                   8259 IRQ0 - IRQ15.
    180   @param  LevelTriggered        TRUE if level triggered. FALSE if edge triggered.
    181 
    182   @retval EFI_SUCCESS           The Irq was enabled on 8259.
    183   @retval EFI_INVALID_PARAMETER The Irq is not valid.
    184 
    185 **/
    186 typedef
    187 EFI_STATUS
    188 (EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(
    189   IN EFI_LEGACY_8259_PROTOCOL           *This,
    190   IN  EFI_8259_IRQ                      Irq,
    191   IN  BOOLEAN                           LevelTriggered
    192   );
    193 
    194 /**
    195   Disable Irq by masking interrupt in 8259
    196 
    197   @param  This                  The protocol instance pointer.
    198   @param  Irq                   8259 IRQ0 - IRQ15.
    199 
    200   @retval EFI_SUCCESS           The Irq was disabled on 8259.
    201   @retval EFI_INVALID_PARAMETER The Irq is not valid.
    202 
    203 **/
    204 typedef
    205 EFI_STATUS
    206 (EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(
    207   IN EFI_LEGACY_8259_PROTOCOL           *This,
    208   IN  EFI_8259_IRQ                      Irq
    209   );
    210 
    211 /**
    212   PciHandle represents a PCI config space of a PCI function. Vector
    213   represents Interrupt Pin (from PCI config space) and it is the data
    214   that is programmed into the Interrupt Line (from the PCI config space)
    215   register.
    216 
    217   @param  This                  The protocol instance pointer.
    218   @param  PciHandle             The PCI function to return the vector for.
    219   @param  Vector                The vector for the function it matches.
    220 
    221   @retval EFI_SUCCESS           A valid Vector was returned.
    222   @retval EFI_INVALID_PARAMETER PciHandle not valid.
    223 
    224 **/
    225 typedef
    226 EFI_STATUS
    227 (EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(
    228   IN EFI_LEGACY_8259_PROTOCOL           *This,
    229   IN  EFI_HANDLE                        PciHandle,
    230   OUT UINT8                             *Vector
    231   );
    232 
    233 /**
    234   Send an EOI to 8259
    235 
    236   @param  This                  The protocol instance pointer.
    237   @param  Irq                   8259 IRQ0 - IRQ15.
    238 
    239   @retval EFI_SUCCESS           EOI was successfully sent to 8259.
    240   @retval EFI_INVALID_PARAMETER The Irq isnot valid.
    241 
    242 **/
    243 typedef
    244 EFI_STATUS
    245 (EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(
    246   IN EFI_LEGACY_8259_PROTOCOL           *This,
    247   IN  EFI_8259_IRQ                      Irq
    248   );
    249 
    250 /**
    251   @par Protocol Description:
    252   Abstracts the 8259 and APIC hardware control between EFI usage and
    253   Compatibility16 usage.
    254 
    255   @param SetVectorBase
    256   Sets the vector bases for master and slave PICs.
    257 
    258   @param GetMask
    259   Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
    260 
    261   @param SetMask
    262   Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
    263 
    264   @param SetMode
    265   Sets PIC mode to 16-bit real mode or 32-bit protected mode.
    266 
    267   @param GetVector
    268   Gets the base vector assigned to an IRQ.
    269 
    270   @param EnableIrq
    271   Enables an IRQ.
    272 
    273   @param DisableIrq
    274   Disables an IRQ.
    275 
    276   @param GetInterruptLine
    277   Gets an IRQ that is assigned to a PCI device.
    278 
    279   @param EndOfInterrupt
    280   Issues the end of interrupt command.
    281 
    282 **/
    283 struct _EFI_LEGACY_8259_PROTOCOL {
    284   EFI_LEGACY_8259_SET_VECTOR_BASE     SetVectorBase;
    285   EFI_LEGACY_8259_GET_MASK            GetMask;
    286   EFI_LEGACY_8259_SET_MASK            SetMask;
    287   EFI_LEGACY_8259_SET_MODE            SetMode;
    288   EFI_LEGACY_8259_GET_VECTOR          GetVector;
    289   EFI_LEGACY_8259_ENABLE_IRQ          EnableIrq;
    290   EFI_LEGACY_8259_DISABLE_IRQ         DisableIrq;
    291   EFI_LEGACY_8259_GET_INTERRUPT_LINE  GetInterruptLine;
    292   EFI_LEGACY_8259_END_OF_INTERRUPT    EndOfInterrupt;
    293 };
    294 
    295 extern EFI_GUID gEfiLegacy8259ProtocolGuid;
    296 
    297 #endif
    298