1 /** @file 2 This file declares the SMM Control abstraction protocol. 3 This protocol is used to initiate SMI/PMI activations. This protocol could be published by either: 4 - A processor driver to abstract the SMI/PMI IPI 5 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an 6 Intel chipset 7 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this 8 event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based 9 systems. 10 11 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR> 12 This program and the accompanying materials are licensed and made available under 13 the terms and conditions of the BSD License that accompanies this distribution. 14 The full text of the license may be found at 15 http://opensource.org/licenses/bsd-license.php. 16 17 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 20 @par Revision Reference: 21 This Protocol is defined in Framework of EFI SMM Core Interface Spec 22 Version 0.9. 23 24 **/ 25 26 #ifndef _SMM_CONTROL_H_ 27 #define _SMM_CONTROL_H_ 28 29 30 typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL; 31 32 #define EFI_SMM_CONTROL_PROTOCOL_GUID \ 33 { \ 34 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \ 35 } 36 // 37 // SMM Access specification Data Structures 38 // 39 typedef struct { 40 /// 41 /// Describes the I/O location of the particular port that engendered the synchronous 42 /// SMI. For example, this location can include but is not limited to the traditional 43 /// PCAT* APM port of 0B2h. 44 /// 45 UINT8 SmiTriggerRegister; 46 /// 47 /// Describes the value that was written to the respective activation port. 48 /// 49 UINT8 SmiDataRegister; 50 } EFI_SMM_CONTROL_REGISTER; 51 52 // 53 // SMM Control specification member function 54 // 55 /** 56 Invokes SMI activation from either the preboot or runtime environment. 57 58 @param This The EFI_SMM_CONTROL_PROTOCOL instance. 59 @param ArgumentBuffer The optional sized data to pass into the protocol activation. 60 @param ArgumentBufferSize The optional size of the data. 61 @param Periodic An optional mechanism to periodically repeat activation. 62 @param ActivationInterval An optional parameter to repeat at this period one 63 time or, if the Periodic Boolean is set, periodically. 64 65 @retval EFI_SUCCESS The SMI/PMI has been engendered. 66 @retval EFI_DEVICE_ERROR The timing is unsupported. 67 @retval EFI_INVALID_PARAMETER The activation period is unsupported. 68 @retval EFI_NOT_STARTED The SMM base service has not been initialized. 69 70 **/ 71 typedef 72 EFI_STATUS 73 (EFIAPI *EFI_SMM_ACTIVATE)( 74 IN EFI_SMM_CONTROL_PROTOCOL *This, 75 IN OUT INT8 *ArgumentBuffer OPTIONAL, 76 IN OUT UINTN *ArgumentBufferSize OPTIONAL, 77 IN BOOLEAN Periodic OPTIONAL, 78 IN UINTN ActivationInterval OPTIONAL 79 ); 80 81 /** 82 Clears any system state that was created in response to the Active call. 83 84 @param This The EFI_SMM_CONTROL_PROTOCOL instance. 85 @param Periodic Optional parameter to repeat at this period one 86 time or, if the Periodic Boolean is set, periodically. 87 88 @retval EFI_SUCCESS The SMI/PMI has been engendered. 89 @retval EFI_DEVICE_ERROR The source could not be cleared. 90 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument. 91 92 **/ 93 typedef 94 EFI_STATUS 95 (EFIAPI *EFI_SMM_DEACTIVATE)( 96 IN EFI_SMM_CONTROL_PROTOCOL *This, 97 IN BOOLEAN Periodic OPTIONAL 98 ); 99 100 /** 101 Provides information on the source register used to generate the SMI. 102 103 @param This The EFI_SMM_CONTROL_PROTOCOL instance. 104 @param SmiRegister A pointer to the SMI register description structure. 105 106 @retval EFI_SUCCESS The register structure has been returned. 107 @retval EFI_DEVICE_ERROR The source could not be cleared. 108 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument. 109 110 **/ 111 typedef 112 EFI_STATUS 113 (EFIAPI *EFI_SMM_GET_REGISTER_INFO)( 114 IN EFI_SMM_CONTROL_PROTOCOL *This, 115 IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister 116 ); 117 118 /** 119 @par Protocol Description: 120 This protocol is used to initiate SMI/PMI activations. 121 122 @param Trigger 123 Initiates the SMI/PMI activation. 124 125 @param Clear 126 Quiesces the SMI/PMI activation. 127 128 @param GetRegisterInfo 129 Provides data on the register used as the source of the SMI. 130 131 @param MinimumTriggerPeriod 132 Minimum interval at which the platform can set the period. 133 134 @retval EFI_SUCCESS The register structure has been returned. 135 **/ 136 137 // 138 // SMM Control Protocol 139 // 140 /** 141 This protocol is used to initiate SMI/PMI activations. 142 This protocol could be published by either: 143 - A processor driver to abstract the SMI/PMI IPI. 144 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset. 145 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this. 146 147 The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This 148 protocol is usable both in boot services and at runtime. The runtime aspect enables an 149 implementation of EFI_SMM_BASE_PROTOCOL.Communicate() to layer upon this service 150 and provide an SMI callback from a general EFI runtime driver. 151 This protocol provides an abstraction to the platform hardware that generates an 152 SMI or PMI. There are often I/O ports that, when accessed, will engender the SMI or PMI. 153 Also, this hardware optionally supports the periodic genearation of these signals. 154 155 **/ 156 struct _EFI_SMM_CONTROL_PROTOCOL { 157 /// 158 /// Initiates the SMI/PMI activation. 159 /// 160 EFI_SMM_ACTIVATE Trigger; 161 /// 162 /// Quiesces the SMI/PMI activation. 163 /// 164 EFI_SMM_DEACTIVATE Clear; 165 /// 166 /// Provides data on the register used as the source of the SMI. 167 /// 168 EFI_SMM_GET_REGISTER_INFO GetRegisterInfo; 169 /// 170 /// Minimum interval at which the platform can set the period. A maximum is not 171 /// specified in that the SMM infrastructure code can emulate a maximum interval that is 172 /// greater than the hardware capabilities by using software emulation in the SMM 173 /// infrastructure code. 174 /// 175 UINTN MinimumTriggerPeriod; 176 }; 177 178 extern EFI_GUID gEfiSmmControlProtocolGuid; 179 180 #endif 181
