1 #------------------------------------------------------------------------------ 2 # 3 # CpuBreakpoint() for AArch64 4 # 5 # Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR> 6 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> 7 # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> 8 # This program and the accompanying materials 9 # are licensed and made available under the terms and conditions of the BSD License 10 # which accompanies this distribution. The full text of the license may be found at 11 # http://opensource.org/licenses/bsd-license.php. 12 # 13 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 # 16 #------------------------------------------------------------------------------ 17 18 .text 19 .p2align 2 20 GCC_ASM_EXPORT(CpuBreakpoint) 21 22 #/** 23 # Generates a breakpoint on the CPU. 24 # 25 # Generates a breakpoint on the CPU. The breakpoint must be implemented such 26 # that code can resume normal execution after the breakpoint. 27 # 28 #**/ 29 #VOID 30 #EFIAPI 31 #CpuBreakpoint ( 32 # VOID 33 # ); 34 # 35 ASM_PFX(CpuBreakpoint): 36 svc 0xdbdb // Superviser exception. Takes 16bit arg -> Armv7 had 'swi' here. 37 ret 38
