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      1 ;------------------------------------------------------------------------------
      2 ;*
      3 ;*   Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
      4 ;*   This program and the accompanying materials
      5 ;*   are licensed and made available under the terms and conditions of the BSD License
      6 ;*   which accompanies this distribution.  The full text of the license may be found at
      7 ;*   http://opensource.org/licenses/bsd-license.php
      8 ;*
      9 ;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     10 ;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     11 ;*
     12 ;*    
     13 ;------------------------------------------------------------------------------
     14 
     15 
     16     .686
     17     .model  flat,C
     18     .const
     19 ;
     20 ; Float control word initial value: 
     21 ; all exceptions masked, double-precision, round-to-nearest
     22 ;
     23 mFpuControlWord       DW      027Fh
     24 ;
     25 ; Multimedia-extensions control word:
     26 ; all exceptions masked, round-to-nearest, flush to zero for masked underflow
     27 ;
     28 mMmxControlWord       DD      01F80h 
     29 
     30     .xmm
     31     .code
     32 
     33 ;
     34 ; Initializes floating point units for requirement of UEFI specification.
     35 ;
     36 ; This function initializes floating-point control word to 0x027F (all exceptions
     37 ; masked,double-precision, round-to-nearest) and multimedia-extensions control word
     38 ; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
     39 ; for masked underflow).
     40 ;
     41 InitializeFloatingPointUnits PROC PUBLIC
     42 
     43     push    ebx
     44 
     45     ;
     46     ; Initialize floating point units
     47     ;
     48     finit
     49     fldcw   mFpuControlWord
     50     
     51     ;
     52     ; Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
     53     ; whether the processor supports SSE instruction.
     54     ;
     55     mov     eax, 1
     56     cpuid
     57     bt      edx, 25
     58     jnc     Done
     59     
     60     ;
     61     ; Set OSFXSR bit 9 in CR4
     62     ;
     63     mov     eax, cr4
     64     or      eax, BIT9
     65     mov     cr4, eax
     66     
     67     ;
     68     ; The processor should support SSE instruction and we can use
     69     ; ldmxcsr instruction
     70     ;
     71     ldmxcsr mMmxControlWord
     72 Done:
     73     pop     ebx
     74 
     75     ret
     76 
     77 InitializeFloatingPointUnits ENDP
     78 
     79 END
     80