1 ;------------------------------------------------------------------------------ ; 2 ; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR> 3 ; This program and the accompanying materials 4 ; are licensed and made available under the terms and conditions of the BSD License 5 ; which accompanies this distribution. The full text of the license may be found at 6 ; http://opensource.org/licenses/bsd-license.php. 7 ; 8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 10 ; 11 ; Module Name: 12 ; 13 ; SmiException.asm 14 ; 15 ; Abstract: 16 ; 17 ; Exception handlers used in SM mode 18 ; 19 ;------------------------------------------------------------------------------- 20 21 EXTERNDEF gcStmPsd:BYTE 22 23 EXTERNDEF SmmStmExceptionHandler:PROC 24 EXTERNDEF SmmStmSetup:PROC 25 EXTERNDEF SmmStmTeardown:PROC 26 EXTERNDEF gStmXdSupported:BYTE 27 28 CODE_SEL EQU 38h 29 DATA_SEL EQU 20h 30 TR_SEL EQU 40h 31 32 MSR_IA32_MISC_ENABLE EQU 1A0h 33 MSR_EFER EQU 0c0000080h 34 MSR_EFER_XD EQU 0800h 35 36 .data 37 38 ; 39 ; This structure serves as a template for all processors. 40 ; 41 gcStmPsd LABEL BYTE 42 DB 'TXTPSSIG' 43 DW PSD_SIZE 44 DW 1 ; Version 45 DD 0 ; LocalApicId 46 DB 0Fh ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr 47 DB 0 ; BIOS to STM 48 DB 0 ; STM to BIOS 49 DB 0 50 DW CODE_SEL 51 DW DATA_SEL 52 DW DATA_SEL 53 DW DATA_SEL 54 DW TR_SEL 55 DW 0 56 DQ 0 ; SmmCr3 57 DQ _OnStmSetup 58 DQ _OnStmTeardown 59 DQ 0 ; SmmSmiHandlerRip - SMM guest entrypoint 60 DQ 0 ; SmmSmiHandlerRsp 61 DQ 0 62 DD 0 63 DD 80010100h ; RequiredStmSmmRevId 64 DQ _OnException 65 DQ 0 ; ExceptionStack 66 DW DATA_SEL 67 DW 01Fh ; ExceptionFilter 68 DD 0 69 DQ 0 70 DQ 0 ; BiosHwResourceRequirementsPtr 71 DQ 0 ; AcpiRsdp 72 DB 0 ; PhysicalAddressBits 73 PSD_SIZE = $ - offset gcStmPsd 74 75 .code 76 ;------------------------------------------------------------------------------ 77 ; SMM Exception handlers 78 ;------------------------------------------------------------------------------ 79 _OnException PROC 80 mov rcx, rsp 81 add rsp, -28h 82 call SmmStmExceptionHandler 83 add rsp, 28h 84 mov ebx, eax 85 mov eax, 4 86 DB 0fh, 01h, 0c1h ; VMCALL 87 jmp $ 88 _OnException ENDP 89 90 _OnStmSetup PROC 91 ; 92 ; Check XD disable bit 93 ; 94 xor r8, r8 95 mov rax, offset ASM_PFX(gStmXdSupported) 96 mov al, [rax] 97 cmp al, 0 98 jz @StmXdDone1 99 mov ecx, MSR_IA32_MISC_ENABLE 100 rdmsr 101 mov r8, rdx ; save MSR_IA32_MISC_ENABLE[63-32] 102 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] 103 jz @f 104 and dx, 0FFFBh ; clear XD Disable bit if it is set 105 wrmsr 106 @@: 107 mov ecx, MSR_EFER 108 rdmsr 109 or ax, MSR_EFER_XD ; enable NXE 110 wrmsr 111 @StmXdDone1: 112 push r8 113 114 add rsp, -20h 115 call SmmStmSetup 116 add rsp, 20h 117 118 mov rax, offset ASM_PFX(gStmXdSupported) 119 mov al, [rax] 120 cmp al, 0 121 jz @f 122 pop rdx ; get saved MSR_IA32_MISC_ENABLE[63-32] 123 test edx, BIT2 124 jz @f 125 mov ecx, MSR_IA32_MISC_ENABLE 126 rdmsr 127 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM 128 wrmsr 129 @@: 130 131 rsm 132 _OnStmSetup ENDP 133 134 _OnStmTeardown PROC 135 ; 136 ; Check XD disable bit 137 ; 138 xor r8, r8 139 mov rax, offset ASM_PFX(gStmXdSupported) 140 mov al, [rax] 141 cmp al, 0 142 jz @StmXdDone2 143 mov ecx, MSR_IA32_MISC_ENABLE 144 rdmsr 145 mov r8, rdx ; save MSR_IA32_MISC_ENABLE[63-32] 146 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34] 147 jz @f 148 and dx, 0FFFBh ; clear XD Disable bit if it is set 149 wrmsr 150 @@: 151 mov ecx, MSR_EFER 152 rdmsr 153 or ax, MSR_EFER_XD ; enable NXE 154 wrmsr 155 @StmXdDone2: 156 push r8 157 158 add rsp, -20h 159 call SmmStmTeardown 160 add rsp, 20h 161 162 mov rax, offset ASM_PFX(gStmXdSupported) 163 mov al, [rax] 164 cmp al, 0 165 jz @f 166 pop rdx ; get saved MSR_IA32_MISC_ENABLE[63-32] 167 test edx, BIT2 168 jz @f 169 mov ecx, MSR_IA32_MISC_ENABLE 170 rdmsr 171 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM 172 wrmsr 173 @@: 174 175 rsm 176 _OnStmTeardown ENDP 177 178 END 179
