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      1 #/** @file
      2 # platform configuration file.
      3 #
      4 # Copyright (c) 2012  - 2016, Intel Corporation. All rights reserved.<BR>
      5 #                                                                                  

      7 # This program and the accompanying materials are licensed and made available under

      9 # the terms and conditions of the BSD License that accompanies this distribution.  

     11 # The full text of the license may be found at                                     

     13 # http://opensource.org/licenses/bsd-license.php.                                  

     15 #                                                                                  

     17 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,            

     19 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.    

     21 #                                                                                  

     23 #
     24 #**/
     25 
     26 #
     27 # TRUE is ENABLE. FASLE is DISABLE.
     28 #
     29 
     30 #
     31 # FSP selection
     32 #
     33 DEFINE MINNOW2_FSP_BUILD = FALSE
     34 
     35 
     36 DEFINE SCSI_ENABLE = TRUE
     37 
     38 
     39 #
     40 # To enable extra configuration for clk gen
     41 #
     42 DEFINE CLKGEN_CONFIG_EXTRA_ENABLE=TRUE
     43 
     44 #
     45 # Feature selection
     46 #
     47 
     48 #
     49 # Select system timer which is used to produce Timer Arch Protocol:
     50 # TRUE  - HPET timer is used.
     51 # FALSE - 8254 timer is used.
     52 #
     53 DEFINE USE_HPET_TIMER = FALSE
     54 
     55 
     56 #
     57 # Feature selection
     58 #
     59 
     60 DEFINE TPM_ENABLED = FALSE
     61 
     62 DEFINE ACPI50_ENABLE = TRUE
     63 DEFINE PERFORMANCE_ENABLE = FALSE
     64 
     65 
     66 DEFINE LFMA_ENABLE = FALSE              # Load module at fixed address feature
     67 DEFINE DXE_COMPRESS_ENABLE = TRUE
     68 DEFINE DXE_CRC32_SECTION_ENABLE = TRUE
     69 DEFINE SSE2_ENABLE = FALSE
     70 
     71 DEFINE SECURE_BOOT_ENABLE = TRUE
     72 DEFINE USER_IDENTIFICATION_ENABLE = FALSE
     73 DEFINE VARIABLE_INFO_ENABLE = FALSE
     74 DEFINE S3_ENABLE = TRUE
     75 DEFINE CAPSULE_ENABLE = TRUE
     76 DEFINE CAPSULE_RESET_ENABLE = TRUE
     77 DEFINE RECOVERY_ENABLE = FALSE
     78 DEFINE MICOCODE_CAPSULE_ENABLE = FALSE
     79 
     80 DEFINE GOP_DRIVER_ENABLE = TRUE
     81 DEFINE DATAHUB_ENABLE = TRUE
     82 DEFINE DATAHUB_STATUS_CODE_ENABLE = TRUE
     83 DEFINE USB_ENABLE = TRUE
     84 
     85 DEFINE ISA_SERIAL_STATUS_CODE_ENABLE = TRUE
     86 DEFINE USB_SERIAL_STATUS_CODE_ENABLE = FALSE
     87 DEFINE RAM_SERIAL_STATUS_CODE_ENABLE = FALSE
     88 
     89 DEFINE ENBDT_S3_SUPPORT = TRUE
     90 
     91 DEFINE LZMA_ENABLE = TRUE
     92 DEFINE S4_ENABLE = TRUE
     93 DEFINE NETWORK_ENABLE = TRUE
     94 DEFINE NETWORK_IP6_ENABLE = TRUE
     95 DEFINE NETWORK_ISCSI_ENABLE = FALSE
     96 DEFINE NETWORK_VLAN_ENABLE = FALSE
     97 
     98 DEFINE SATA_ENABLE       = TRUE
     99 DEFINE PCIESC_ENABLE     = TRUE
    100 
    101 #
    102 # Enable source level debug default
    103 #
    104 DEFINE SOURCE_DEBUG_ENABLE     = FALSE
    105 
    106 
    107 
    108 
    109