1 #/** @file 2 # FDF file of Platform. 3 # 4 # Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR> 5 # 6 # This program and the accompanying materials are licensed and made available under 7 # the terms and conditions of the BSD License that accompanies this distribution. 8 # The full text of the license may be found at 9 # http://opensource.org/licenses/bsd-license.php. 10 # 11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 # 14 # 15 #**/ 16 17 [Defines] 18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device. 19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device. 20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device. 21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device. 22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000 23 DEFINE FLASH_AREA_SIZE = 0x00800000 24 25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000 26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000 27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000 28 29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000 30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000 31 32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000 33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000 34 35 36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000 37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000 38 39 !if $(MINNOW2_FSP_BUILD) == TRUE 40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000 41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000 42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000 43 44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000 45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000 46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000 47 48 !endif 49 50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000 51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000 52 53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000 54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000 55 56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000 57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000 58 59 ################################################################################ 60 # 61 # FD Section 62 # The [FD] Section is made up of the definition statements and a 63 # description of what goes into the Flash Device Image. Each FD section 64 # defines one flash "device" image. A flash device image may be one of 65 # the following: Removable media bootable image (like a boot floppy 66 # image,) an Option ROM image (that would be "flashed" into an add-in 67 # card,) a System "Flash" image (that would be burned into a system's 68 # flash) or an Update ("Capsule") image that will be used to update and 69 # existing system flash. 70 # 71 ################################################################################ 72 [FD.Vlv] 73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device. 74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device. 75 ErasePolarity = 1 76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device. 77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device. 78 79 # 80 #Flash location override based on actual flash map 81 # 82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS) 83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE) 84 85 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60 86 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60 87 88 !if $(MINNOW2_FSP_BUILD) == TRUE 89 # put below PCD value setting into dsc file 90 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) 91 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) 92 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60 93 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS) 94 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE) 95 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE) 96 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE) 97 98 !endif 99 ################################################################################ 100 # 101 # Following are lists of FD Region layout which correspond to the locations of different 102 # images within the flash device. 103 # 104 # Regions must be defined in ascending order and may not overlap. 105 # 106 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by 107 # the pipe "|" character, followed by the size of the region, also in hex with the leading 108 # "0x" characters. Like: 109 # Offset|Size 110 # PcdOffsetCName|PcdSizeCName 111 # RegionType <FV, DATA, or FILE> 112 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000 113 # 114 ################################################################################ 115 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux, 116 # so we hardcode the default value of variable here. 117 # Please note that we MUST update the binary once the default value is changed. 118 119 # 120 # CPU Microcodes 121 # 122 123 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE) 124 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize 125 FV = MICROCODE_FV 126 127 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE) 128 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize 129 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin 130 131 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE) 132 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize 133 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin 134 135 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE) 136 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize 137 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin 138 139 !if $(MINNOW2_FSP_BUILD) == TRUE 140 141 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE) 142 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize 143 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin 144 145 146 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE) 147 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin 148 149 !endif 150 151 # 152 # Main Block 153 # 154 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE) 155 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize 156 FV = FVMAIN_COMPACT 157 158 # 159 # FV Recovery#2 160 # 161 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE) 162 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size 163 FV = FVRECOVERY2 164 165 # 166 # FV Recovery 167 # 168 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE) 169 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize 170 FV = FVRECOVERY 171 172 ################################################################################ 173 # 174 # FV Section 175 # 176 # [FV] section is used to define what components or modules are placed within a flash 177 # device file. This section also defines order the components and modules are positioned 178 # within the image. The [FV] section consists of define statements, set statements and 179 # module statements. 180 # 181 ################################################################################ 182 [FV.MICROCODE_FV] 183 BlockSize = $(FLASH_BLOCK_SIZE) 184 FvAlignment = 16 185 ERASE_POLARITY = 1 186 MEMORY_MAPPED = TRUE 187 STICKY_WRITE = TRUE 188 LOCK_CAP = TRUE 189 LOCK_STATUS = FALSE 190 WRITE_DISABLED_CAP = TRUE 191 WRITE_ENABLED_CAP = TRUE 192 WRITE_STATUS = TRUE 193 WRITE_LOCK_CAP = TRUE 194 WRITE_LOCK_STATUS = TRUE 195 READ_DISABLED_CAP = TRUE 196 READ_ENABLED_CAP = TRUE 197 READ_STATUS = TRUE 198 READ_LOCK_CAP = TRUE 199 READ_LOCK_STATUS = TRUE 200 201 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 { 202 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin 203 } 204 205 !if $(RECOVERY_ENABLE) 206 [FV.FVRECOVERY_COMPONENTS] 207 FvAlignment = 16 #FV alignment and FV attributes setting. 208 ERASE_POLARITY = 1 209 MEMORY_MAPPED = TRUE 210 STICKY_WRITE = TRUE 211 LOCK_CAP = TRUE 212 LOCK_STATUS = TRUE 213 WRITE_DISABLED_CAP = TRUE 214 WRITE_ENABLED_CAP = TRUE 215 WRITE_STATUS = TRUE 216 WRITE_LOCK_CAP = TRUE 217 WRITE_LOCK_STATUS = TRUE 218 READ_DISABLED_CAP = TRUE 219 READ_ENABLED_CAP = TRUE 220 READ_STATUS = TRUE 221 READ_LOCK_CAP = TRUE 222 READ_LOCK_STATUS = TRUE 223 224 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf 225 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf 226 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf 227 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf 228 INF FatPkg/FatPei/FatPei.inf 229 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf 230 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf 231 !endif 232 233 ################################################################################ 234 # 235 # FV Section 236 # 237 # [FV] section is used to define what components or modules are placed within a flash 238 # device file. This section also defines order the components and modules are positioned 239 # within the image. The [FV] section consists of define statements, set statements and 240 # module statements. 241 # 242 ################################################################################ 243 [FV.FVRECOVERY2] 244 BlockSize = $(FLASH_BLOCK_SIZE) 245 FvAlignment = 16 #FV alignment and FV attributes setting. 246 ERASE_POLARITY = 1 247 MEMORY_MAPPED = TRUE 248 STICKY_WRITE = TRUE 249 LOCK_CAP = TRUE 250 LOCK_STATUS = TRUE 251 WRITE_DISABLED_CAP = TRUE 252 WRITE_ENABLED_CAP = TRUE 253 WRITE_STATUS = TRUE 254 WRITE_LOCK_CAP = TRUE 255 WRITE_LOCK_STATUS = TRUE 256 READ_DISABLED_CAP = TRUE 257 READ_ENABLED_CAP = TRUE 258 READ_STATUS = TRUE 259 READ_LOCK_CAP = TRUE 260 READ_LOCK_STATUS = TRUE 261 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092 262 263 264 265 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf 266 267 !if $(MINNOW2_FSP_BUILD) == FALSE 268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf 269 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf 270 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf 271 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf 272 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf 273 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf 274 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf 275 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf 276 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf 277 !endif 278 279 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf 280 !if $(TPM_ENABLED) == TRUE 281 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf 282 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf 283 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf 284 !endif 285 !if $(FTPM_ENABLE) == TRUE 286 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config 287 !endif 288 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 289 290 !if $(ACPI50_ENABLE) == TRUE 291 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf 292 !endif 293 !if $(PERFORMANCE_ENABLE) == TRUE 294 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf 295 !endif 296 297 !if $(RECOVERY_ENABLE) 298 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 { 299 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid} 300 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID 301 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS 302 } 303 } 304 !endif 305 306 [FV.FVRECOVERY] 307 BlockSize = $(FLASH_BLOCK_SIZE) 308 FvAlignment = 16 #FV alignment and FV attributes setting. 309 ERASE_POLARITY = 1 310 MEMORY_MAPPED = TRUE 311 STICKY_WRITE = TRUE 312 LOCK_CAP = TRUE 313 LOCK_STATUS = TRUE 314 WRITE_DISABLED_CAP = TRUE 315 WRITE_ENABLED_CAP = TRUE 316 WRITE_STATUS = TRUE 317 WRITE_LOCK_CAP = TRUE 318 WRITE_LOCK_STATUS = TRUE 319 READ_DISABLED_CAP = TRUE 320 READ_ENABLED_CAP = TRUE 321 READ_STATUS = TRUE 322 READ_LOCK_CAP = TRUE 323 READ_LOCK_STATUS = TRUE 324 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091 325 326 327 !if $(MINNOW2_FSP_BUILD) == TRUE 328 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf 329 !else 330 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf 331 !endif 332 333 INF MdeModulePkg/Core/Pei/PeiMain.inf 334 !if $(MINNOW2_FSP_BUILD) == TRUE 335 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf 336 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf 337 !endif 338 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf 339 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf 340 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf 341 342 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf 343 344 !if $(MINNOW2_FSP_BUILD) == FALSE 345 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf 346 !endif 347 348 !if $(FTPM_ENABLE) == TRUE 349 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf 350 !endif 351 352 !if $(SOURCE_DEBUG_ENABLE) == TRUE 353 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf 354 !endif 355 356 357 !if $(CAPSULE_ENABLE) == TRUE 358 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf 359 !if $(DXE_ARCHITECTURE) == "X64" 360 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf 361 !endif 362 !endif 363 364 !if $(MINNOW2_FSP_BUILD) == FALSE 365 !if $(PCIESC_ENABLE) == TRUE 366 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf 367 !endif 368 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf 369 !endif 370 371 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf 372 373 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) 374 # FMP image decriptor 375 INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf 376 !endif 377 378 [FV.FVMAIN] 379 BlockSize = $(FLASH_BLOCK_SIZE) 380 FvAlignment = 16 381 ERASE_POLARITY = 1 382 MEMORY_MAPPED = TRUE 383 STICKY_WRITE = TRUE 384 LOCK_CAP = TRUE 385 LOCK_STATUS = TRUE 386 WRITE_DISABLED_CAP = TRUE 387 WRITE_ENABLED_CAP = TRUE 388 WRITE_STATUS = TRUE 389 WRITE_LOCK_CAP = TRUE 390 WRITE_LOCK_STATUS = TRUE 391 READ_DISABLED_CAP = TRUE 392 READ_ENABLED_CAP = TRUE 393 READ_STATUS = TRUE 394 READ_LOCK_CAP = TRUE 395 READ_LOCK_STATUS = TRUE 396 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5 397 398 APRIORI DXE { 399 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 400 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf 401 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf 402 } 403 404 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 { 405 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin 406 } 407 408 # 409 # EDK II Related Platform codes 410 # 411 412 !if $(MINNOW2_FSP_BUILD) == TRUE 413 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf 414 !endif 415 416 INF MdeModulePkg/Core/Dxe/DxeMain.inf 417 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 418 !if $(ACPI50_ENABLE) == TRUE 419 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf 420 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf 421 !endif 422 423 424 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf 425 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf 426 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf 427 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf 428 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf 429 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf 430 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf 431 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf 432 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf 433 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf 434 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf 435 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf 436 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf 437 438 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf 439 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf 440 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf 441 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf 442 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf 443 !if $(SECURE_BOOT_ENABLE) 444 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf 445 !endif 446 447 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 448 449 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf 450 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf 451 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf 452 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf 453 454 455 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf 456 457 !if $(DATAHUB_ENABLE) == TRUE 458 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf 459 !endif 460 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf 461 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf 462 463 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf 464 465 # 466 # EDK II Related Silicon codes 467 # 468 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf 469 470 !if $(USE_HPET_TIMER) == TRUE 471 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf 472 !else 473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf 474 !endif 475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf 476 477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf 478 479 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf 480 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf 481 482 !if $(MINNOW2_FSP_BUILD) == FALSE 483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf 484 !endif 485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf 486 !if $(PCIESC_ENABLE) == TRUE 487 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf 488 !endif 489 490 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf 491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf 492 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf 493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf 494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf 495 !if $(MINNOW2_FSP_BUILD) == FALSE 496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf 497 !else 498 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf 499 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf 500 !endif 501 !if $(MINNOW2_FSP_BUILD) == FALSE 502 !if $(SEC_ENABLE) == TRUE 503 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf 504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf 505 !endif 506 !endif 507 !if $(TPM_ENABLED) == TRUE 508 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf 509 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf 510 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf 511 !endif 512 !if $(FTPM_ENABLE) == TRUE 513 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf 514 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf 515 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf 516 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf 517 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf 518 !endif 519 520 # 521 # EDK II Related Platform codes 522 # 523 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf 524 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf 525 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf 526 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf 527 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf 528 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf 529 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf 530 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf 531 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf 532 !if $(GOP_DRIVER_ENABLE) == TRUE 533 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf 534 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 { 535 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid} 536 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi 537 SECTION UI = "IntelGopDriver" 538 } 539 !endif 540 541 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf 542 # 543 # SMM 544 # 545 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf 546 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf 547 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf 548 549 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf 550 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf 551 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf 552 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf 553 554 # 555 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell 556 # 557 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf 558 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf 559 560 # 561 # ACPI 562 # 563 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf 564 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf 565 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf 566 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf 567 568 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf 569 570 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf 571 572 # 573 # PCI 574 # 575 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 576 577 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf 578 579 580 # 581 # ISA 582 # 583 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf 584 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf 585 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf 586 !if $(SOURCE_DEBUG_ENABLE) != TRUE 587 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf 588 !endif 589 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf 590 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf 591 592 # 593 # SDIO 594 # 595 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf 596 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf 597 # 598 # IDE/SCSI/AHCI 599 # 600 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf 601 602 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf 603 604 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf 605 !if $(SATA_ENABLE) == TRUE 606 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf 607 # 608 609 # 610 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf 611 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf 612 !if $(SCSI_ENABLE) == TRUE 613 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf 614 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf 615 !endif 616 # 617 !endif 618 # Console 619 # 620 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf 621 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf 622 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf 623 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf 624 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf 625 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf 626 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf 627 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf 628 # 629 # USB 630 # 631 !if $(USB_ENABLE) == TRUE 632 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf 633 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf 634 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf 635 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf 636 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf 637 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf 638 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf 639 !endif 640 641 # 642 # ECP 643 # 644 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf 645 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf 646 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf 647 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf 648 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf 649 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf 650 # 651 # SMBIOS 652 # 653 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf 654 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf 655 656 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf 657 658 # 659 # Legacy Modules 660 # 661 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf 662 663 # 664 # FAT file system 665 # 666 INF FatPkg/EnhancedFatDxe/Fat.inf 667 668 # 669 # UEFI Shell 670 # 671 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) { 672 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi 673 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi 674 } 675 676 677 678 !if $(GOP_DRIVER_ENABLE) == TRUE 679 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA { 680 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin 681 SECTION UI = "IntelGopVbt" 682 } 683 !endif 684 685 # 686 # Network Modules 687 # 688 !if $(NETWORK_ENABLE) == TRUE 689 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C { 690 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi 691 SECTION UI = "UNDI" 692 } 693 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf 694 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf 695 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf 696 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf 697 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf 698 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf 699 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf 700 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf 701 !if $(NETWORK_IP6_ENABLE) == TRUE 702 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf 703 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf 704 INF NetworkPkg/IpSecDxe/IpSecDxe.inf 705 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf 706 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf 707 !endif 708 !if $(NETWORK_IP6_ENABLE) == TRUE 709 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf 710 INF NetworkPkg/TcpDxe/TcpDxe.inf 711 !else 712 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf 713 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf 714 !endif 715 !if $(NETWORK_VLAN_ENABLE) == TRUE 716 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf 717 !endif 718 !if $(NETWORK_ISCSI_ENABLE) == TRUE 719 !if $(NETWORK_IP6_ENABLE) == TRUE 720 INF NetworkPkg/IScsiDxe/IScsiDxe.inf 721 !else 722 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf 723 !endif 724 !endif 725 !endif 726 727 !if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE) 728 INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf 729 !endif 730 !if $(CAPSULE_ENABLE) 731 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf 732 !endif 733 !if $(MICOCODE_CAPSULE_ENABLE) 734 INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf 735 !endif 736 737 !if $(RECOVERY_ENABLE) 738 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) { 739 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin 740 SECTION UI = "Rsa2048Sha256TestSigningPublicKey" 741 } 742 !endif 743 744 !if $(CAPSULE_ENABLE) 745 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) { 746 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer 747 SECTION UI = "Pkcs7TestRoot" 748 } 749 !endif 750 751 [FV.FVMAIN_COMPACT] 752 BlockSize = $(FLASH_BLOCK_SIZE) 753 FvAlignment = 16 754 ERASE_POLARITY = 1 755 MEMORY_MAPPED = TRUE 756 STICKY_WRITE = TRUE 757 LOCK_CAP = TRUE 758 LOCK_STATUS = TRUE 759 WRITE_DISABLED_CAP = TRUE 760 WRITE_ENABLED_CAP = TRUE 761 WRITE_STATUS = TRUE 762 WRITE_LOCK_CAP = TRUE 763 WRITE_LOCK_STATUS = TRUE 764 READ_DISABLED_CAP = TRUE 765 READ_ENABLED_CAP = TRUE 766 READ_STATUS = TRUE 767 READ_LOCK_CAP = TRUE 768 READ_LOCK_STATUS = TRUE 769 770 771 772 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { 773 !if $(LZMA_ENABLE) == TRUE 774 # LZMA Compress 775 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { 776 SECTION FV_IMAGE = FVMAIN 777 } 778 !else 779 !if $(DXE_COMPRESS_ENABLE) == TRUE 780 # Tiano Compress 781 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { 782 SECTION FV_IMAGE = FVMAIN 783 } 784 !else 785 # No Compress 786 SECTION COMPRESS PI_NONE { 787 SECTION FV_IMAGE = FVMAIN 788 } 789 !endif 790 !endif 791 } 792 793 [FV.SETUP_DATA] 794 BlockSize = $(FLASH_BLOCK_SIZE) 795 #NumBlocks = 0x10 796 FvAlignment = 16 797 ERASE_POLARITY = 1 798 MEMORY_MAPPED = TRUE 799 STICKY_WRITE = TRUE 800 LOCK_CAP = TRUE 801 LOCK_STATUS = TRUE 802 WRITE_DISABLED_CAP = TRUE 803 WRITE_ENABLED_CAP = TRUE 804 WRITE_STATUS = TRUE 805 WRITE_LOCK_CAP = TRUE 806 WRITE_LOCK_STATUS = TRUE 807 READ_DISABLED_CAP = TRUE 808 READ_ENABLED_CAP = TRUE 809 READ_STATUS = TRUE 810 READ_LOCK_CAP = TRUE 811 READ_LOCK_STATUS = TRUE 812 813 814 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) 815 [FV.CapsuleDispatchFv] 816 FvAlignment = 16 817 ERASE_POLARITY = 1 818 MEMORY_MAPPED = TRUE 819 STICKY_WRITE = TRUE 820 LOCK_CAP = TRUE 821 LOCK_STATUS = TRUE 822 WRITE_DISABLED_CAP = TRUE 823 WRITE_ENABLED_CAP = TRUE 824 WRITE_STATUS = TRUE 825 WRITE_LOCK_CAP = TRUE 826 WRITE_LOCK_STATUS = TRUE 827 READ_DISABLED_CAP = TRUE 828 READ_ENABLED_CAP = TRUE 829 READ_STATUS = TRUE 830 READ_LOCK_CAP = TRUE 831 READ_LOCK_STATUS = TRUE 832 833 !if $(CAPSULE_ENABLE) 834 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf 835 !endif 836 837 !endif 838 839 ################################################################################ 840 # 841 # Rules are use with the [FV] section's module INF type to define 842 # how an FFS file is created for a given INF file. The following Rule are the default 843 # rules for the different module type. User can add the customized rules to define the 844 # content of the FFS file. 845 # 846 ################################################################################ 847 [Rule.Common.SEC] 848 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { 849 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi 850 RAW BIN Align = 16 |.com 851 } 852 853 [Rule.Common.SEC.BINARY] 854 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { 855 PE32 PE32 Align = 8 |.efi 856 !if $(MINNOW2_FSP_BUILD) == TRUE 857 RAW RAW |.raw 858 !else 859 RAW BIN Align = 16 |.com 860 !endif 861 } 862 863 [Rule.Common.PEI_CORE] 864 FILE PEI_CORE = $(NAMED_GUID) { 865 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 866 UI STRING="$(MODULE_NAME)" Optional 867 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 868 } 869 870 [Rule.Common.PEIM] 871 FILE PEIM = $(NAMED_GUID) { 872 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 873 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 874 UI STRING="$(MODULE_NAME)" Optional 875 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 876 } 877 878 [Rule.Common.PEIM.BINARY] 879 FILE PEIM = $(NAMED_GUID) { 880 PEI_DEPEX PEI_DEPEX Optional |.depex 881 PE32 PE32 Align = Auto |.efi 882 UI STRING="$(MODULE_NAME)" Optional 883 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 884 } 885 886 [Rule.Common.PEIM.BIOSID] 887 FILE PEIM = $(NAMED_GUID) { 888 RAW BIN BiosId.bin 889 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 890 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi 891 UI STRING="$(MODULE_NAME)" Optional 892 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 893 } 894 895 [Rule.Common.USER_DEFINED.APINIT] 896 FILE RAW = $(NAMED_GUID) Fixed Align=4K { 897 RAW SEC_BIN |.com 898 } 899 #cjia 2011-07-21 900 [Rule.Common.USER_DEFINED.LEGACY16] 901 FILE FREEFORM = $(NAMED_GUID) { 902 UI STRING="$(MODULE_NAME)" Optional 903 RAW BIN |.bin 904 } 905 #cjia 906 907 [Rule.Common.USER_DEFINED.ASM16] 908 FILE FREEFORM = $(NAMED_GUID) { 909 UI STRING="$(MODULE_NAME)" Optional 910 RAW BIN |.com 911 } 912 913 [Rule.Common.DXE_CORE] 914 FILE DXE_CORE = $(NAMED_GUID) { 915 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 916 UI STRING="$(MODULE_NAME)" Optional 917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 918 } 919 920 [Rule.Common.UEFI_DRIVER] 921 FILE DRIVER = $(NAMED_GUID) { 922 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 923 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 924 UI STRING="$(MODULE_NAME)" Optional 925 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 926 } 927 928 [Rule.Common.UEFI_DRIVER.BINARY] 929 FILE DRIVER = $(NAMED_GUID) { 930 DXE_DEPEX DXE_DEPEX Optional |.depex 931 PE32 PE32 |.efi 932 UI STRING="$(MODULE_NAME)" Optional 933 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 934 } 935 936 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY] 937 FILE DRIVER = $(NAMED_GUID) { 938 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex 939 PE32 PE32 |.efi 940 UI STRING="$(MODULE_NAME)" Optional 941 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 942 } 943 944 [Rule.Common.DXE_DRIVER] 945 FILE DRIVER = $(NAMED_GUID) { 946 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 947 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 948 UI STRING="$(MODULE_NAME)" Optional 949 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 950 } 951 952 [Rule.Common.DXE_DRIVER.BINARY] 953 FILE DRIVER = $(NAMED_GUID) { 954 DXE_DEPEX DXE_DEPEX Optional |.depex 955 PE32 PE32 |.efi 956 UI STRING="$(MODULE_NAME)" Optional 957 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 958 } 959 960 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE] 961 FILE DRIVER = $(NAMED_GUID) { 962 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 963 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 964 UI STRING="$(MODULE_NAME)" Optional 965 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 966 RAW ACPI Optional |.acpi 967 RAW ASL Optional |.aml 968 } 969 970 [Rule.Common.DXE_RUNTIME_DRIVER] 971 FILE DRIVER = $(NAMED_GUID) { 972 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 973 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 974 UI STRING="$(MODULE_NAME)" Optional 975 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 976 } 977 978 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY] 979 FILE DRIVER = $(NAMED_GUID) { 980 DXE_DEPEX DXE_DEPEX Optional |.depex 981 PE32 PE32 |.efi 982 UI STRING="$(MODULE_NAME)" Optional 983 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 984 } 985 986 [Rule.Common.DXE_SMM_DRIVER] 987 FILE SMM = $(NAMED_GUID) { 988 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 989 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 990 UI STRING="$(MODULE_NAME)" Optional 991 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 992 } 993 994 [Rule.Common.DXE_SMM_DRIVER.BINARY] 995 FILE SMM = $(NAMED_GUID) { 996 SMM_DEPEX SMM_DEPEX |.depex 997 PE32 PE32 |.efi 998 RAW BIN Optional |.aml 999 UI STRING="$(MODULE_NAME)" Optional 1000 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1001 } 1002 1003 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE] 1004 FILE SMM = $(NAMED_GUID) { 1005 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 1006 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 1007 UI STRING="$(MODULE_NAME)" Optional 1008 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1009 RAW ACPI Optional |.acpi 1010 RAW ASL Optional |.aml 1011 } 1012 1013 [Rule.Common.SMM_CORE] 1014 FILE SMM_CORE = $(NAMED_GUID) { 1015 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 1016 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 1017 UI STRING="$(MODULE_NAME)" Optional 1018 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1019 } 1020 1021 [Rule.Common.SMM_CORE.BINARY] 1022 FILE SMM_CORE = $(NAMED_GUID) { 1023 DXE_DEPEX DXE_DEPEX Optional |.depex 1024 PE32 PE32 |.efi 1025 UI STRING="$(MODULE_NAME)" Optional 1026 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1027 } 1028 1029 [Rule.Common.UEFI_APPLICATION] 1030 FILE APPLICATION = $(NAMED_GUID) { 1031 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 1032 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 1033 UI STRING="$(MODULE_NAME)" Optional 1034 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1035 } 1036 1037 [Rule.Common.UEFI_APPLICATION.UI] 1038 FILE APPLICATION = $(NAMED_GUID) { 1039 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 1040 UI STRING="Enter Setup" 1041 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1042 } 1043 1044 [Rule.Common.USER_DEFINED] 1045 FILE FREEFORM = $(NAMED_GUID) { 1046 UI STRING="$(MODULE_NAME)" Optional 1047 RAW BIN |.bin 1048 } 1049 1050 [Rule.Common.USER_DEFINED.ACPITABLE] 1051 FILE FREEFORM = $(NAMED_GUID) { 1052 RAW ACPI Optional |.acpi 1053 RAW ASL Optional |.aml 1054 } 1055 1056 [Rule.Common.USER_DEFINED.ACPITABLE2] 1057 FILE FREEFORM = $(NAMED_GUID) { 1058 RAW ASL Optional |.aml 1059 } 1060 1061 [Rule.Common.ACPITABLE] 1062 FILE FREEFORM = $(NAMED_GUID) { 1063 RAW ACPI Optional |.acpi 1064 RAW ASL Optional |.aml 1065 } 1066 1067 [Rule.Common.PEIM.FMP_IMAGE_DESC] 1068 FILE PEIM = $(NAMED_GUID) { 1069 RAW BIN |.acpi 1070 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 1071 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi 1072 UI STRING="$(MODULE_NAME)" Optional 1073 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 1074 } 1075 1076
