1 // RUN: %clang_cc1 -triple thumbv7-none-linux-gnueabihf \ 2 // RUN: -target-abi aapcs \ 3 // RUN: -target-cpu cortex-a7 \ 4 // RUN: -mfloat-abi hard \ 5 // RUN: -ffreestanding \ 6 // RUN: -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s 7 8 #include <arm_neon.h> 9 10 // CHECK-LABEL: define <2 x float> @test_fma_order(<2 x float> %accum, <2 x float> %lhs, <2 x float> %rhs) #0 { 11 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %accum to <8 x i8> 12 // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %lhs to <8 x i8> 13 // CHECK: [[TMP2:%.*]] = bitcast <2 x float> %rhs to <8 x i8> 14 // CHECK: [[TMP3:%.*]] = bitcast <8 x i8> [[TMP0]] to <2 x float> 15 // CHECK: [[TMP4:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i8> [[TMP2]] to <2 x float> 17 // CHECK: [[TMP6:%.*]] = call <2 x float> @llvm.fma.v2f32(<2 x float> [[TMP4]], <2 x float> [[TMP5]], <2 x float> [[TMP3]]) #2 18 // CHECK: ret <2 x float> [[TMP6]] 19 float32x2_t test_fma_order(float32x2_t accum, float32x2_t lhs, float32x2_t rhs) { 20 return vfma_f32(accum, lhs, rhs); 21 } 22 23 // CHECK-LABEL: define <4 x float> @test_fmaq_order(<4 x float> %accum, <4 x float> %lhs, <4 x float> %rhs) #0 { 24 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %accum to <16 x i8> 25 // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %lhs to <16 x i8> 26 // CHECK: [[TMP2:%.*]] = bitcast <4 x float> %rhs to <16 x i8> 27 // CHECK: [[TMP3:%.*]] = bitcast <16 x i8> [[TMP0]] to <4 x float> 28 // CHECK: [[TMP4:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> 29 // CHECK: [[TMP5:%.*]] = bitcast <16 x i8> [[TMP2]] to <4 x float> 30 // CHECK: [[TMP6:%.*]] = call <4 x float> @llvm.fma.v4f32(<4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x float> [[TMP3]]) #2 31 // CHECK: ret <4 x float> [[TMP6]] 32 float32x4_t test_fmaq_order(float32x4_t accum, float32x4_t lhs, float32x4_t rhs) { 33 return vfmaq_f32(accum, lhs, rhs); 34 } 35
