1 // REQUIRES: arm-registered-target 2 // RUN: %clang_cc1 -triple armv6-unknown-unknown -emit-llvm -o - %s | FileCheck %s 3 4 void test0(void) { 5 asm volatile("mov r0, r0" :: ); 6 } 7 void test1(void) { 8 asm volatile("mov r0, r0" ::: 9 "cc", "memory" ); 10 } 11 void test2(void) { 12 asm volatile("mov r0, r0" ::: 13 "r0", "r1", "r2", "r3"); 14 asm volatile("mov r0, r0" ::: 15 "r4", "r5", "r6", "r8"); 16 } 17 void test3(void) { 18 asm volatile("mov r0, r0" ::: 19 "a1", "a2", "a3", "a4"); 20 asm volatile("mov r0, r0" ::: 21 "v1", "v2", "v3", "v5"); 22 } 23 24 25 // {} should not be treated as asm variants. 26 void test4(float *a, float *b) { 27 // CHECK: @test4 28 // CHECK: call void asm sideeffect "vld1.32 {d8[],d9[]}, 29 __asm__ volatile ( 30 "vld1.32 {d8[],d9[]}, [%1,:32] \n\t" 31 "vst1.32 {q4}, [%0,:128] \n\t" 32 :: "r"(a), "r"(b)); 33 } 34 35 // {sp, lr, pc} are the canonical names for {r13, r14, r15}. 36 // 37 // CHECK: @test5 38 // CHECK: call void asm sideeffect "", "~{sp},~{lr},~{pc},~{sp},~{lr},~{pc}"() 39 void test5() { 40 __asm__("" : : : "r13", "r14", "r15", "sp", "lr", "pc"); 41 } 42 43 // CHECK: @test6 44 // CHECK: call void asm sideeffect "", " 45 // CHECK: ~{s0},~{s1},~{s2},~{s3},~{s4},~{s5},~{s6},~{s7}, 46 // CHECK: ~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15}, 47 // CHECK: ~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23}, 48 // CHECK: ~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() 49 void test6() { 50 __asm__("" : : : 51 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 52 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", 53 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", 54 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31"); 55 } 56
