1 // RUN: %clang_cc1 %s -triple=x86_64-apple-darwin -target-feature +bmi -emit-llvm -o - -Werror | FileCheck %s 2 3 // Don't include mm_malloc.h, it's system specific. 4 #define __MM_MALLOC_H 5 6 #include <x86intrin.h> 7 8 // NOTE: This should match the tests in llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll 9 10 // The double underscore intrinsics are for compatibility with 11 // AMD's BMI interface. The single underscore intrinsics 12 // are for compatibility with Intel's BMI interface. 13 // Apart from the underscores, the interfaces are identical 14 // except in one case: although the 'bextr' register-form 15 // instruction is identical in hardware, the AMD and Intel 16 // intrinsics are different! 17 18 unsigned short test__tzcnt_u16(unsigned short __X) { 19 // CHECK-LABEL: test__tzcnt_u16 20 // CHECK: zext i16 %{{.*}} to i32 21 // CHECK: icmp ne i32 %{{.*}}, 0 22 // CHECK: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 true) 23 return __tzcnt_u16(__X); 24 } 25 26 unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) { 27 // CHECK-LABEL: test__andn_u32 28 // CHECK: xor i32 %{{.*}}, -1 29 // CHECK: and i32 %{{.*}}, %{{.*}} 30 return __andn_u32(__X, __Y); 31 } 32 33 unsigned int test__bextr_u32(unsigned int __X, unsigned int __Y) { 34 // CHECK-LABEL: test__bextr_u32 35 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}}) 36 return __bextr_u32(__X, __Y); 37 } 38 39 unsigned int test__blsi_u32(unsigned int __X) { 40 // CHECK-LABEL: test__blsi_u32 41 // CHECK: sub i32 0, %{{.*}} 42 // CHECK: and i32 %{{.*}}, %{{.*}} 43 return __blsi_u32(__X); 44 } 45 46 unsigned int test__blsmsk_u32(unsigned int __X) { 47 // CHECK-LABEL: test__blsmsk_u32 48 // CHECK: sub i32 %{{.*}}, 1 49 // CHECK: xor i32 %{{.*}}, %{{.*}} 50 return __blsmsk_u32(__X); 51 } 52 53 unsigned int test__blsr_u32(unsigned int __X) { 54 // CHECK-LABEL: test__blsr_u32 55 // CHECK: sub i32 %{{.*}}, 1 56 // CHECK: and i32 %{{.*}}, %{{.*}} 57 return __blsr_u32(__X); 58 } 59 60 unsigned int test__tzcnt_u32(unsigned int __X) { 61 // CHECK-LABEL: test__tzcnt_u32 62 // CHECK: icmp ne i32 %{{.*}}, 0 63 // CHECK: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 true) 64 return __tzcnt_u32(__X); 65 } 66 67 int test_mm_tzcnt_32(unsigned int __X) { 68 // CHECK-LABEL: test_mm_tzcnt_32 69 // CHECK: icmp ne i32 %{{.*}}, 0 70 // CHECK: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 true) 71 return _mm_tzcnt_32(__X); 72 } 73 74 unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) { 75 // CHECK-LABEL: test__andn_u64 76 // CHECK: xor i64 %{{.*}}, -1 77 // CHECK: and i64 %{{.*}}, %{{.*}} 78 return __andn_u64(__X, __Y); 79 } 80 81 unsigned long long test__bextr_u64(unsigned long __X, unsigned long __Y) { 82 // CHECK-LABEL: test__bextr_u64 83 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}}) 84 return __bextr_u64(__X, __Y); 85 } 86 87 unsigned long long test__blsi_u64(unsigned long long __X) { 88 // CHECK-LABEL: test__blsi_u64 89 // CHECK: sub i64 0, %{{.*}} 90 // CHECK: and i64 %{{.*}}, %{{.*}} 91 return __blsi_u64(__X); 92 } 93 94 unsigned long long test__blsmsk_u64(unsigned long long __X) { 95 // CHECK-LABEL: test__blsmsk_u64 96 // CHECK: sub i64 %{{.*}}, 1 97 // CHECK: xor i64 %{{.*}}, %{{.*}} 98 return __blsmsk_u64(__X); 99 } 100 101 unsigned long long test__blsr_u64(unsigned long long __X) { 102 // CHECK-LABEL: test__blsr_u64 103 // CHECK: sub i64 %{{.*}}, 1 104 // CHECK: and i64 %{{.*}}, %{{.*}} 105 return __blsr_u64(__X); 106 } 107 108 unsigned long long test__tzcnt_u64(unsigned long long __X) { 109 // CHECK-LABEL: test__tzcnt_u64 110 // CHECK: icmp ne i64 %{{.*}}, 0 111 // CHECK: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 true) 112 return __tzcnt_u64(__X); 113 } 114 115 long long test_mm_tzcnt_64(unsigned long long __X) { 116 // CHECK-LABEL: test_mm_tzcnt_64 117 // CHECK: icmp ne i64 %{{.*}}, 0 118 // CHECK: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 true) 119 return _mm_tzcnt_64(__X); 120 } 121 122 // Intel intrinsics 123 124 unsigned short test_tzcnt_u16(unsigned short __X) { 125 // CHECK-LABEL: test_tzcnt_u16 126 // CHECK: zext i16 %{{.*}} to i32 127 // CHECK: icmp ne i32 %{{.*}}, 0 128 // CHECK: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 true) 129 return _tzcnt_u16(__X); 130 } 131 132 unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) { 133 // CHECK-LABEL: test_andn_u32 134 // CHECK: xor i32 %{{.*}}, -1 135 // CHECK: and i32 %{{.*}}, %{{.*}} 136 return _andn_u32(__X, __Y); 137 } 138 139 unsigned int test_bextr_u32(unsigned int __X, unsigned int __Y, 140 unsigned int __Z) { 141 // CHECK-LABEL: test_bextr_u32 142 // CHECK: and i32 %{{.*}}, 255 143 // CHECK: and i32 %{{.*}}, 255 144 // CHECK: shl i32 %{{.*}}, 8 145 // CHECK: or i32 %{{.*}}, %{{.*}} 146 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}}) 147 return _bextr_u32(__X, __Y, __Z); 148 } 149 150 unsigned int test_blsi_u32(unsigned int __X) { 151 // CHECK-LABEL: test_blsi_u32 152 // CHECK: sub i32 0, %{{.*}} 153 // CHECK: and i32 %{{.*}}, %{{.*}} 154 return _blsi_u32(__X); 155 } 156 157 unsigned int test_blsmsk_u32(unsigned int __X) { 158 // CHECK-LABEL: test_blsmsk_u32 159 // CHECK: sub i32 %{{.*}}, 1 160 // CHECK: xor i32 %{{.*}}, %{{.*}} 161 return _blsmsk_u32(__X); 162 } 163 164 unsigned int test_blsr_u32(unsigned int __X) { 165 // CHECK-LABEL: test_blsr_u32 166 // CHECK: sub i32 %{{.*}}, 1 167 // CHECK: and i32 %{{.*}}, %{{.*}} 168 return _blsr_u32(__X); 169 } 170 171 unsigned int test_tzcnt_u32(unsigned int __X) { 172 // CHECK-LABEL: test_tzcnt_u32 173 // CHECK: icmp ne i32 %{{.*}}, 0 174 // CHECK: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 true) 175 return _tzcnt_u32(__X); 176 } 177 178 unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) { 179 // CHECK-LABEL: test_andn_u64 180 // CHECK: xor i64 %{{.*}}, -1 181 // CHECK: and i64 %{{.*}}, %{{.*}} 182 return _andn_u64(__X, __Y); 183 } 184 185 unsigned long long test_bextr_u64(unsigned long __X, unsigned int __Y, 186 unsigned int __Z) { 187 // CHECK-LABEL: test_bextr_u64 188 // CHECK: and i32 %{{.*}}, 255 189 // CHECK: and i32 %{{.*}}, 255 190 // CHECK: shl i32 %{{.*}}, 8 191 // CHECK: or i32 %{{.*}}, %{{.*}} 192 // CHECK: zext i32 %{{.*}} to i64 193 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}}) 194 return _bextr_u64(__X, __Y, __Z); 195 } 196 197 unsigned long long test_blsi_u64(unsigned long long __X) { 198 // CHECK-LABEL: test_blsi_u64 199 // CHECK: sub i64 0, %{{.*}} 200 // CHECK: and i64 %{{.*}}, %{{.*}} 201 return _blsi_u64(__X); 202 } 203 204 unsigned long long test_blsmsk_u64(unsigned long long __X) { 205 // CHECK-LABEL: test_blsmsk_u64 206 // CHECK: sub i64 %{{.*}}, 1 207 // CHECK: xor i64 %{{.*}}, %{{.*}} 208 return _blsmsk_u64(__X); 209 } 210 211 unsigned long long test_blsr_u64(unsigned long long __X) { 212 // CHECK-LABEL: test_blsr_u64 213 // CHECK: sub i64 %{{.*}}, 1 214 // CHECK: and i64 %{{.*}}, %{{.*}} 215 return _blsr_u64(__X); 216 } 217 218 unsigned long long test_tzcnt_u64(unsigned long long __X) { 219 // CHECK-LABEL: test_tzcnt_u64 220 // CHECK: icmp ne i64 %{{.*}}, 0 221 // CHECK: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 true) 222 return _tzcnt_u64(__X); 223 } 224
