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      1 /******************************************************************************
      2  *
      3  * Copyright (C) 2015 The Android Open Source Project
      4  *
      5  * Licensed under the Apache License, Version 2.0 (the "License");
      6  * you may not use this file except in compliance with the License.
      7  * You may obtain a copy of the License at:
      8  *
      9  * http://www.apache.org/licenses/LICENSE-2.0
     10  *
     11  * Unless required by applicable law or agreed to in writing, software
     12  * distributed under the License is distributed on an "AS IS" BASIS,
     13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     14  * See the License for the specific language governing permissions and
     15  * limitations under the License.
     16  *
     17  *****************************************************************************
     18  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
     19 */
     20 /**
     21 *******************************************************************************
     22 * @file
     23 *  ih264e_defs.h
     24 *
     25 * @brief
     26 *  Definitions used in the encoder
     27 *
     28 * @author
     29 *  ittiam
     30 *
     31 * @remarks
     32 *  None
     33 *
     34 *******************************************************************************
     35 */
     36 
     37 #ifndef IH264E_DEFS_H_
     38 #define IH264E_DEFS_H_
     39 
     40 
     41 #define PARSE_COEFF_DATA_BLOCK_4x4(pv_mb_coeff_data, ps_mb_coeff_data, u4_nnz, u4_sig_coeff_map, pi2_res_block)   \
     42 {                                                                          \
     43     ps_mb_coeff_data = pv_mb_coeff_data;                                   \
     44     u4_nnz = ps_mb_coeff_data->i4_sig_map_nnz & 0xff;                      \
     45     if (u4_nnz)                                                            \
     46     {                                                                      \
     47         u4_sig_coeff_map = ps_mb_coeff_data->i4_sig_map_nnz >> 16;         \
     48         pi2_res_block = ps_mb_coeff_data->ai2_residue;                     \
     49         pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue + ALIGN2(u4_nnz); \
     50     }                                                                      \
     51     else                                                                   \
     52     {                                                                      \
     53       pv_mb_coeff_data = ps_mb_coeff_data->ai2_residue;                    \
     54     }                                                                      \
     55 }
     56 
     57 /*****************************************************************************/
     58 /* Width and height restrictions                                             */
     59 /*****************************************************************************/
     60 /**
     61  * Minimum width supported by codec
     62  */
     63 #define MIN_WD   16
     64 
     65 /**
     66  * Maximum width supported by codec
     67  */
     68 
     69 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */
     70 #define MAX_WD   2560
     71 
     72 /**
     73  * Minimum height supported by codec
     74  */
     75 #define MIN_HT   16
     76 
     77 /**
     78  * Maximum height supported by codec
     79  */
     80 
     81 /* changed by haining@ to support Nexus 6P screen size, was previously 1920 */
     82 #define MAX_HT   2560
     83 
     84 /*****************************************************************************/
     85 /* Padding sizes                                                             */
     86 /*****************************************************************************/
     87 /**
     88  * Padding used for top of the frame
     89  */
     90 #define PAD_TOP     32
     91 
     92 /**
     93  * Padding used for bottom of the frame
     94  */
     95 #define PAD_BOT     32
     96 
     97 /**
     98  * Padding used at left of the frame
     99  */
    100 #define PAD_LEFT    32
    101 
    102 /**
    103  * Padding used at right of the frame
    104  */
    105 #define PAD_RIGHT   32
    106 /**
    107  * Padding for width
    108  */
    109 #define PAD_WD      (PAD_LEFT + PAD_RIGHT)
    110 /**
    111  * Padding for height
    112  */
    113 #define PAD_HT      (PAD_TOP  + PAD_BOT)
    114 
    115 /*
    116  * buffer width and height for half pel buffers
    117  */
    118 #define HP_BUFF_WD  24
    119 #define HP_BUFF_HT  18
    120 
    121 /*****************************************************************************/
    122 /* Number of frame restrictions                                              */
    123 /*****************************************************************************/
    124 /**
    125  *  Maximum number of reference pictures
    126  */
    127 #define MAX_REF_PIC_CNT  2
    128 
    129 /**
    130  *  Minimum number of reference pictures
    131  */
    132 #define MIN_REF_PIC_CNT  1
    133 
    134 /**
    135  *  Maximum number of B pictures between two I/P pictures
    136  */
    137 #define MAX_NUM_BFRAMES     10
    138 
    139 /**
    140  *  Maximum number of reference buffers in DPB manager
    141  */
    142 #define MAX_REF_CNT  32
    143 
    144 /*****************************************************************************/
    145 /* Minimum size of inter prediction unit supported by encoder                */
    146 /*****************************************************************************/
    147 #define ENC_MIN_PU_SIZE     16
    148 
    149 /*****************************************************************************/
    150 /* Num cores releated defs                                                   */
    151 /*****************************************************************************/
    152 /**
    153  *  Maximum number of cores
    154  */
    155 #define MAX_NUM_CORES       8
    156 
    157 /**
    158  *  Maximum number of threads for pixel processing
    159  */
    160 #define MAX_PROCESS_THREADS MAX_NUM_CORES
    161 
    162 /**
    163  * Maximum process context sets
    164  * Used to stagger encoding of MAX_CTXT_SETS in parallel
    165  */
    166 #define MAX_CTXT_SETS   1
    167 /**
    168  * Maximum number of contexts
    169  * Kept as twice the number of threads, to make it easier to initialize the contexts
    170  * from master thread
    171  */
    172 #define MAX_PROCESS_CTXT    MAX_NUM_CORES * MAX_CTXT_SETS
    173 
    174 /*****************************************************************************/
    175 /* Profile and level restrictions                                            */
    176 /*****************************************************************************/
    177 /**
    178  * Max level supported by the codec
    179  */
    180 #define MAX_LEVEL  IH264_LEVEL_51
    181 
    182 /**
    183  * Min level supported by the codec
    184  */
    185 #define MIN_LEVEL  IH264_LEVEL_10
    186 
    187 /**
    188  * Maximum number of slice headers that are held in memory simultaneously
    189  * For single core implementation only 1 slice header is enough.
    190  * But for multi-core parsing thread needs to ensure that slice headers are
    191  * stored till the last CB in a slice is decoded.
    192  * Parsing thread has to wait till last CB of a slice is consumed before reusing
    193  * overwriting the slice header
    194  * MAX_SLICE_HDR_CNT is assumed to be a power of 2
    195  */
    196 
    197 #define LOG2_MAX_SLICE_HDR_CNT 8
    198 #define MAX_SLICE_HDR_CNT (1 << LOG2_MAX_SLICE_HDR_CNT)
    199 
    200 /* Generic declarations */
    201 #define DEFAULT_MAX_LEVEL               40
    202 #define DEFAULT_RECON_ENABLE            0
    203 #define DEFAULT_RC                      IVE_RC_STORAGE
    204 #define DEFAULT_MAX_FRAMERATE           120000
    205 #define DEFAULT_MAX_BITRATE             50000000
    206 #define DEFAULT_MAX_NUM_BFRAMES         0
    207 #define DEFAULT_MAX_SRCH_RANGE_X        256
    208 #define DEFAULT_MAX_SRCH_RANGE_Y        256
    209 #define DEFAULT_SLICE_PARAM             256
    210 #define DEFAULT_SRC_FRAME_RATE          30000
    211 #define DEFAULT_TGT_FRAME_RATE          30000
    212 #define DEFAULT_BITRATE                 6000000
    213 #define DEFAULT_QP_MIN                  10
    214 #define DEFAULT_QP_MAX                  51
    215 #define DEFAULT_I_QP                    25
    216 #define DEFAULT_P_QP                    28
    217 #define DEFAULT_B_QP                    28
    218 #define DEFAULT_AIR_MODE                IVE_AIR_MODE_NONE
    219 #define DEFAULT_AIR_REFRESH_PERIOD      30
    220 #define DEFAULT_VBV_DELAY               1000
    221 #define DEFAULT_VBV_SIZE                16800000 /* level 3.1 */
    222 #define DEFAULT_NUM_CORES               1
    223 #define DEFAULT_ME_SPEED_PRESET         100
    224 #define DEFAULT_HPEL                    1
    225 #define DEFAULT_QPEL                    1
    226 #define DEFAULT_I4                      1
    227 #define DEFAULT_I8                      0
    228 #define DEFAULT_I16                     1
    229 #define DEFAULT_ENABLE_FAST_SAD         0
    230 #define DEFAULT_ENABLE_SATQD            1
    231 #define DEFAULT_MIN_SAD_ENABLE          0
    232 #define DEFAULT_MIN_SAD_DISABLE         -1
    233 #define DEFAULT_SRCH_RNG_X              64
    234 #define DEFAULT_SRCH_RNG_Y              48
    235 #define DEFAULT_I_INTERVAL              30
    236 #define DEFAULT_IDR_INTERVAL            1000
    237 #define DEFAULT_B_FRAMES                0
    238 #define DEFAULT_DISABLE_DEBLK_LEVEL     0
    239 #define DEFAULT_PROFILE                 IV_PROFILE_BASE
    240 #define DEFAULT_MIN_INTRA_FRAME_RATE    1
    241 #define DEFAULT_MAX_INTRA_FRAME_RATE    2147483647
    242 #define DEFAULT_MIN_BUFFER_DELAY        30
    243 #define DEFAULT_MAX_BUFFER_DELAY        20000
    244 #define DEFAULT_STRIDE                  0
    245 #define DEFAULT_ENC_SPEED_PRESET        IVE_USER_DEFINED
    246 #define DEFAULT_PRE_ENC_ME              0
    247 #define DEFAULT_PRE_ENC_IPE             0
    248 #define DEFAULT_ENTROPY_CODING_MODE     0
    249 
    250 /** Maximum number of entries in input buffer list */
    251 #define MAX_INP_BUF_LIST_ENTRIES         32
    252 
    253 /** Maximum number of entries in output buffer list */
    254 #define MAX_OUT_BUF_LIST_ENTRIES         32
    255 
    256 /** Maximum number of entries in recon buffer list used within the encoder */
    257 #define MAX_REC_LIST_ENTRIES             16
    258 
    259 /** Number of buffers created to hold half-pel planes for every reference buffer */
    260 #define HPEL_PLANES_CNT                 1
    261 
    262 /** Number of buffers Needed for SUBPEL and BIPRED computation */
    263 #define SUBPEL_BUFF_CNT                 4
    264 
    265 /**
    266  *****************************************************************************
    267  * Macro to compute total size required to hold on set of scaling matrices
    268  *****************************************************************************
    269  */
    270 #define SCALING_MAT_SIZE(m_scaling_mat_size)                                 \
    271 {                                                                            \
    272     m_scaling_mat_size = 6 * TRANS_SIZE_4 * TRANS_SIZE_4;                    \
    273     m_scaling_mat_size += 6 * TRANS_SIZE_8 * TRANS_SIZE_8;                   \
    274     m_scaling_mat_size += 6 * TRANS_SIZE_16 * TRANS_SIZE_16;                 \
    275     m_scaling_mat_size += 2 * TRANS_SIZE_32 * TRANS_SIZE_32;                 \
    276 }
    277 
    278 /**
    279  ******************************************************************************
    280  *  @brief Macros to get raster scan position of a block[8x8] / sub block[4x4]
    281  ******************************************************************************
    282  */
    283 #define GET_BLK_RASTER_POS_X(x)     ((x & 0x01))
    284 #define GET_BLK_RASTER_POS_Y(y)     ((y >> 1))
    285 #define GET_SUB_BLK_RASTER_POS_X(x) ((x & 0x01))
    286 #define GET_SUB_BLK_RASTER_POS_Y(y) ((y >> 1))
    287 
    288 #define NUM_RC_MEMTABS 17
    289 
    290 /**
    291  ***************************************************************************
    292  * Enum to hold various mem records being request
    293  ****************************************************************************
    294  */
    295 enum
    296 {
    297     /**
    298      * Codec Object at API level
    299      */
    300     MEM_REC_IV_OBJ,
    301 
    302     /**
    303      * Codec context
    304      */
    305     MEM_REC_CODEC,
    306 
    307     /**
    308      * Cabac context
    309      */
    310     MEM_REC_CABAC,
    311 
    312     /**
    313      * Cabac context_mb_info
    314      */
    315     MEM_REC_CABAC_MB_INFO,
    316 
    317     /**
    318      * entropy context
    319      */
    320     MEM_REC_ENTROPY,
    321 
    322     /**
    323      * Buffer to hold coeff data
    324      */
    325     MEM_REC_MB_COEFF_DATA,
    326 
    327     /**
    328      * Buffer to hold coeff data
    329      */
    330     MEM_REC_MB_HEADER_DATA,
    331 
    332     /**
    333      * Motion vector bank
    334      */
    335     MEM_REC_MVBANK,
    336 
    337     /**
    338      * Motion vector bits
    339      */
    340     MEM_REC_MVBITS,
    341 
    342     /**
    343      * Holds mem records passed to the codec.
    344      */
    345     MEM_REC_BACKUP,
    346 
    347     /**
    348      * Holds SPS
    349      */
    350     MEM_REC_SPS,
    351 
    352     /**
    353      * Holds PPS
    354      */
    355     MEM_REC_PPS,
    356 
    357     /**
    358      * Holds Slice Headers
    359      */
    360     MEM_REC_SLICE_HDR,
    361 
    362     /**
    363      * Contains map indicating slice index per MB basis
    364      */
    365     MEM_REC_SLICE_MAP,
    366 
    367     /**
    368      * Holds thread handles
    369      */
    370     MEM_REC_THREAD_HANDLE,
    371 
    372     /**
    373      * Holds control call mutex
    374      */
    375     MEM_REC_CTL_MUTEX,
    376 
    377     /**
    378      * Holds entropy call mutex
    379      */
    380     MEM_REC_ENTROPY_MUTEX,
    381 
    382     /**
    383      * Holds memory for Process JOB Queue
    384      */
    385     MEM_REC_PROC_JOBQ,
    386 
    387     /**
    388      * Holds memory for Entropy JOB Queue
    389      */
    390     MEM_REC_ENTROPY_JOBQ,
    391 
    392     /**
    393      * Contains status map indicating processing status per MB basis
    394      */
    395     MEM_REC_PROC_MAP,
    396 
    397     /**
    398      * Contains status map indicating deblocking status per MB basis
    399      */
    400     MEM_REC_DBLK_MAP,
    401 
    402     /*
    403      * Contains AIR map and mask
    404      */
    405     MEM_REC_AIR_MAP,
    406 
    407     /**
    408      * Contains status map indicating ME status per MB basis
    409      */
    410     MEM_REC_ME_MAP,
    411 
    412     /**
    413      * Holds dpb manager context
    414      */
    415     MEM_REC_DPB_MGR,
    416 
    417     /**
    418      * Holds intermediate buffers needed during processing stage
    419      * Memory for process contexts is allocated in this memtab
    420      */
    421     MEM_REC_PROC_SCRATCH,
    422 
    423     /**
    424      * Holds buffers for vert_bs, horz_bs and QP (all frame level)
    425      */
    426     MEM_REC_QUANT_PARAM,
    427 
    428     /**
    429      * Holds top row syntax information
    430      */
    431     MEM_REC_TOP_ROW_SYN_INFO,
    432 
    433     /**
    434      * Holds buffers for vert_bs, horz_bs and QP (all frame level)
    435      */
    436     MEM_REC_BS_QP,
    437 
    438     /**
    439      * Holds input buffer manager context
    440      */
    441     MEM_REC_INP_PIC,
    442 
    443     /**
    444      * Holds output buffer manager context
    445      */
    446     MEM_REC_OUT,
    447 
    448     /**
    449      * Holds picture buffer manager context and array of pic_buf_ts
    450      * Also holds reference picture buffers in non-shared mode
    451      */
    452     MEM_REC_REF_PIC,
    453 
    454     /*
    455      * Mem record for color space conversion
    456      */
    457     MEM_REC_CSC,
    458 
    459     /**
    460      * NMB info struct
    461      */
    462     MEM_REC_MB_INFO_NMB,
    463 
    464     /**
    465      * Rate control of memory records.
    466      */
    467     MEM_REC_RC,
    468 
    469     /**
    470      * Place holder to compute number of memory records.
    471      */
    472     MEM_REC_CNT = MEM_REC_RC + NUM_RC_MEMTABS,
    473 
    474     /*
    475      * Do not add anything below
    476      */
    477 };
    478 
    479 #define DISABLE_DEBLOCK_INTERVAL 8
    480 
    481 /**
    482  ****************************************************************************
    483  * Disable deblock levels
    484  * Level 0 enables deblocking completely and level 4 disables completely
    485  * Other levels are intermediate values to control deblocking level
    486  ****************************************************************************
    487  */
    488 enum
    489 {
    490     /**
    491      * Enable deblocking completely
    492      */
    493     DISABLE_DEBLK_LEVEL_0,
    494 
    495     /**
    496      * Disable only within MB edges - Not supported currently
    497      */
    498     DISABLE_DEBLK_LEVEL_1,
    499 
    500     /**
    501      * Enable deblocking once in DEBLOCK_INTERVAL number of pictures
    502      * and for I slices
    503      */
    504     DISABLE_DEBLK_LEVEL_2,
    505 
    506     /**
    507      * Enable deblocking only for I slices
    508      */
    509     DISABLE_DEBLK_LEVEL_3,
    510 
    511     /**
    512      * Disable deblocking completely
    513      */
    514     DISABLE_DEBLK_LEVEL_4
    515 };
    516 
    517 /**
    518  ****************************************************************************
    519  * Number of buffers for I/O based on format
    520  ****************************************************************************
    521  */
    522 
    523 /** Minimum number of input buffers */
    524 #define MIN_INP_BUFS                 2
    525 
    526 /** Minimum number of output buffers */
    527 #define MIN_OUT_BUFS                1
    528 
    529 /** Minimum number of components in bitstream buffer */
    530 #define MIN_BITS_BUFS_COMP           1
    531 
    532 /** Minimum number of components in raw buffer */
    533 #define MIN_RAW_BUFS_420_COMP        3
    534 #define MIN_RAW_BUFS_422ILE_COMP     1
    535 #define MIN_RAW_BUFS_RGB565_COMP     1
    536 #define MIN_RAW_BUFS_RGBA8888_COMP   1
    537 #define MIN_RAW_BUFS_420SP_COMP      2
    538 
    539 /** Maximum number of active config paramter sets */
    540 #define MAX_ACTIVE_CONFIG_PARAMS 32
    541 
    542 /**
    543 ******************************************************************************
    544  *  @brief Thresholds for luma & chroma to determine if the 8x8 subblock needs
    545  *  to be encoded or skipped
    546 ******************************************************************************
    547 */
    548 #define LUMA_SUB_BLOCK_SKIP_THRESHOLD 4
    549 #define LUMA_BLOCK_SKIP_THRESHOLD 5
    550 #define CHROMA_BLOCK_SKIP_THRESHOLD 4
    551 
    552 /**
    553 ******************************************************************************
    554  *  @brief      defines the first byte of a NAL unit
    555  *  forbidden zero bit - nal_ref_idc - nal_unit_type
    556 ******************************************************************************
    557 */
    558 /* [0 - 11 - 00111] */
    559 #define NAL_SPS_FIRST_BYTE 0x67
    560 
    561 /* [0 - 11 - 01000] */
    562 #define NAL_PPS_FIRST_BYTE 0x68
    563 
    564 /* [0 - 11 - 00001] */
    565 #define NAL_SLICE_FIRST_BYTE 0x61
    566 
    567 /* [0 - 00 - 00001] */
    568 #define NAL_NON_REF_SLICE_FIRST_BYTE 0x01
    569 
    570 /* [0 - 11 - 00101] */
    571 #define NAL_IDR_SLICE_FIRST_BYTE 0x65
    572 
    573 /* [0 - 00 - 01100] */
    574 #define NAL_FILLER_FIRST_BYTE 0x0C
    575 
    576 /* [0 - 00 - 00110] */
    577 #define NAL_SEI_FIRST_BYTE 0x06
    578 
    579 #define H264_ALLOC_INTER_FRM_INTV        2
    580 
    581 #define H264_MPEG_QP_MAP    255
    582 
    583 #define MPEG2_QP_ELEM       (H264_MPEG_QP_MAP + 1)
    584 #define H264_QP_ELEM        (MAX_H264_QP + 1)
    585 
    586 #define H264_INIT_QUANT_I                26
    587 #define H264_INIT_QUANT_P                34
    588 
    589 #endif /*IH264E_DEFS_H_*/
    590