1 /* 2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. 3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sub license, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 #ifndef _VIA_DRM_H_ 25 #define _VIA_DRM_H_ 26 27 #include "drm.h" 28 29 /* WARNING: These defines must be the same as what the Xserver uses. 30 * if you change them, you must change the defines in the Xserver. 31 */ 32 33 #ifndef _VIA_DEFINES_ 34 #define _VIA_DEFINES_ 35 36 #include "via_drmclient.h" 37 38 #define VIA_NR_SAREA_CLIPRECTS 8 39 #define VIA_NR_XVMC_PORTS 10 40 #define VIA_NR_XVMC_LOCKS 5 41 #define VIA_MAX_CACHELINE_SIZE 64 42 #define XVMCLOCKPTR(saPriv,lockNo) \ 43 ((__volatile__ struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ 44 (VIA_MAX_CACHELINE_SIZE - 1)) & \ 45 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ 46 VIA_MAX_CACHELINE_SIZE*(lockNo))) 47 48 /* Each region is a minimum of 64k, and there are at most 64 of them. 49 */ 50 #define VIA_NR_TEX_REGIONS 64 51 #define VIA_LOG_MIN_TEX_REGION_SIZE 16 52 #endif 53 54 #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ 55 #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ 56 #define VIA_UPLOAD_CTX 0x4 57 #define VIA_UPLOAD_BUFFERS 0x8 58 #define VIA_UPLOAD_TEX0 0x10 59 #define VIA_UPLOAD_TEX1 0x20 60 #define VIA_UPLOAD_CLIPRECTS 0x40 61 #define VIA_UPLOAD_ALL 0xff 62 63 /* VIA specific ioctls */ 64 #define DRM_VIA_ALLOCMEM 0x00 65 #define DRM_VIA_FREEMEM 0x01 66 #define DRM_VIA_AGP_INIT 0x02 67 #define DRM_VIA_FB_INIT 0x03 68 #define DRM_VIA_MAP_INIT 0x04 69 #define DRM_VIA_DEC_FUTEX 0x05 70 #define NOT_USED 71 #define DRM_VIA_DMA_INIT 0x07 72 #define DRM_VIA_CMDBUFFER 0x08 73 #define DRM_VIA_FLUSH 0x09 74 #define DRM_VIA_PCICMD 0x0a 75 #define DRM_VIA_CMDBUF_SIZE 0x0b 76 #define NOT_USED 77 #define DRM_VIA_WAIT_IRQ 0x0d 78 #define DRM_VIA_DMA_BLIT 0x0e 79 #define DRM_VIA_BLIT_SYNC 0x0f 80 81 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) 82 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) 83 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) 84 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) 85 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) 86 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) 87 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) 88 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) 89 #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) 90 #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) 91 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ 92 drm_via_cmdbuf_size_t) 93 #define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) 94 #define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) 95 #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) 96 97 /* Indices into buf.Setup where various bits of state are mirrored per 98 * context and per buffer. These can be fired at the card as a unit, 99 * or in a piecewise fashion as required. 100 */ 101 102 #define VIA_TEX_SETUP_SIZE 8 103 104 /* Flags for clear ioctl 105 */ 106 #define VIA_FRONT 0x1 107 #define VIA_BACK 0x2 108 #define VIA_DEPTH 0x4 109 #define VIA_STENCIL 0x8 110 #define VIA_MEM_VIDEO 0 /* matches drm constant */ 111 #define VIA_MEM_AGP 1 /* matches drm constant */ 112 #define VIA_MEM_SYSTEM 2 113 #define VIA_MEM_MIXED 3 114 #define VIA_MEM_UNKNOWN 4 115 116 typedef struct { 117 __u32 offset; 118 __u32 size; 119 } drm_via_agp_t; 120 121 typedef struct { 122 __u32 offset; 123 __u32 size; 124 } drm_via_fb_t; 125 126 typedef struct { 127 __u32 context; 128 __u32 type; 129 __u32 size; 130 unsigned long index; 131 unsigned long offset; 132 } drm_via_mem_t; 133 134 typedef struct _drm_via_init { 135 enum { 136 VIA_INIT_MAP = 0x01, 137 VIA_CLEANUP_MAP = 0x02 138 } func; 139 140 unsigned long sarea_priv_offset; 141 unsigned long fb_offset; 142 unsigned long mmio_offset; 143 unsigned long agpAddr; 144 } drm_via_init_t; 145 146 typedef struct _drm_via_futex { 147 enum { 148 VIA_FUTEX_WAIT = 0x00, 149 VIA_FUTEX_WAKE = 0X01 150 } func; 151 __u32 ms; 152 __u32 lock; 153 __u32 val; 154 } drm_via_futex_t; 155 156 typedef struct _drm_via_dma_init { 157 enum { 158 VIA_INIT_DMA = 0x01, 159 VIA_CLEANUP_DMA = 0x02, 160 VIA_DMA_INITIALIZED = 0x03 161 } func; 162 163 unsigned long offset; 164 unsigned long size; 165 unsigned long reg_pause_addr; 166 } drm_via_dma_init_t; 167 168 typedef struct _drm_via_cmdbuffer { 169 char *buf; 170 unsigned long size; 171 } drm_via_cmdbuffer_t; 172 173 /* Warning: If you change the SAREA structure you must change the Xserver 174 * structure as well */ 175 176 typedef struct _drm_via_tex_region { 177 unsigned char next, prev; /* indices to form a circular LRU */ 178 unsigned char inUse; /* owned by a client, or free? */ 179 int age; /* tracked by clients to update local LRU's */ 180 } drm_via_tex_region_t; 181 182 typedef struct _drm_via_sarea { 183 unsigned int dirty; 184 unsigned int nbox; 185 struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; 186 drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; 187 int texAge; /* last time texture was uploaded */ 188 int ctxOwner; /* last context to upload state */ 189 int vertexPrim; 190 191 /* 192 * Below is for XvMC. 193 * We want the lock integers alone on, and aligned to, a cache line. 194 * Therefore this somewhat strange construct. 195 */ 196 197 char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; 198 199 unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; 200 unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; 201 unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ 202 203 /* Used by the 3d driver only at this point, for pageflipping: 204 */ 205 unsigned int pfCurrentOffset; 206 } drm_via_sarea_t; 207 208 typedef struct _drm_via_cmdbuf_size { 209 enum { 210 VIA_CMDBUF_SPACE = 0x01, 211 VIA_CMDBUF_LAG = 0x02 212 } func; 213 int wait; 214 __u32 size; 215 } drm_via_cmdbuf_size_t; 216 217 typedef enum { 218 VIA_IRQ_ABSOLUTE = 0x0, 219 VIA_IRQ_RELATIVE = 0x1, 220 VIA_IRQ_SIGNAL = 0x10000000, 221 VIA_IRQ_FORCE_SEQUENCE = 0x20000000 222 } via_irq_seq_type_t; 223 224 #define VIA_IRQ_FLAGS_MASK 0xF0000000 225 226 enum drm_via_irqs { 227 drm_via_irq_hqv0 = 0, 228 drm_via_irq_hqv1, 229 drm_via_irq_dma0_dd, 230 drm_via_irq_dma0_td, 231 drm_via_irq_dma1_dd, 232 drm_via_irq_dma1_td, 233 drm_via_irq_num 234 }; 235 236 struct drm_via_wait_irq_request { 237 unsigned irq; 238 via_irq_seq_type_t type; 239 __u32 sequence; 240 __u32 signal; 241 }; 242 243 typedef union drm_via_irqwait { 244 struct drm_via_wait_irq_request request; 245 struct drm_wait_vblank_reply reply; 246 } drm_via_irqwait_t; 247 248 typedef struct drm_via_blitsync { 249 __u32 sync_handle; 250 unsigned engine; 251 } drm_via_blitsync_t; 252 253 /* - * Below,"flags" is currently unused but will be used for possible future 254 * extensions like kernel space bounce buffers for bad alignments and 255 * blit engine busy-wait polling for better latency in the absence of 256 * interrupts. 257 */ 258 259 typedef struct drm_via_dmablit { 260 __u32 num_lines; 261 __u32 line_length; 262 263 __u32 fb_addr; 264 __u32 fb_stride; 265 266 unsigned char *mem_addr; 267 __u32 mem_stride; 268 269 __u32 flags; 270 int to_fb; 271 272 drm_via_blitsync_t sync; 273 } drm_via_dmablit_t; 274 275 #endif /* _VIA_DRM_H_ */ 276
