1 ; RUN: llc -march=amdgcn -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s 2 3 declare i32 @llvm.amdgcn.workitem.id.x() readnone 4 5 ;;;==========================================================================;;; 6 ;;; MUBUF LOAD TESTS 7 ;;;==========================================================================;;; 8 9 ; MUBUF load with an immediate byte offset that fits into 12-bits 10 ; CHECK-LABEL: {{^}}mubuf_load0: 11 ; CHECK: buffer_load_dword v{{[0-9]}}, off, s[{{[0-9]+:[0-9]+}}], 0 offset:4 ; encoding: [0x04,0x00,0x30,0xe0 12 define void @mubuf_load0(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 13 entry: 14 %0 = getelementptr i32, i32 addrspace(1)* %in, i64 1 15 %1 = load i32, i32 addrspace(1)* %0 16 store i32 %1, i32 addrspace(1)* %out 17 ret void 18 } 19 20 ; MUBUF load with the largest possible immediate offset 21 ; CHECK-LABEL: {{^}}mubuf_load1: 22 ; CHECK: buffer_load_ubyte v{{[0-9]}}, off, s[{{[0-9]+:[0-9]+}}], 0 offset:4095 ; encoding: [0xff,0x0f,0x20,0xe0 23 define void @mubuf_load1(i8 addrspace(1)* %out, i8 addrspace(1)* %in) { 24 entry: 25 %0 = getelementptr i8, i8 addrspace(1)* %in, i64 4095 26 %1 = load i8, i8 addrspace(1)* %0 27 store i8 %1, i8 addrspace(1)* %out 28 ret void 29 } 30 31 ; MUBUF load with an immediate byte offset that doesn't fit into 12-bits 32 ; CHECK-LABEL: {{^}}mubuf_load2: 33 ; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x1000 34 ; CHECK: buffer_load_dword v{{[0-9]}}, off, s[{{[0-9]+:[0-9]+}}], [[SOFFSET]] ; encoding: [0x00,0x00,0x30,0xe0 35 define void @mubuf_load2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 36 entry: 37 %0 = getelementptr i32, i32 addrspace(1)* %in, i64 1024 38 %1 = load i32, i32 addrspace(1)* %0 39 store i32 %1, i32 addrspace(1)* %out 40 ret void 41 } 42 43 ; MUBUF load with a 12-bit immediate offset and a register offset 44 ; CHECK-LABEL: {{^}}mubuf_load3: 45 ; CHECK-NOT: ADD 46 ; CHECK: buffer_load_dword v{{[0-9]}}, v[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x30,0xe0 47 define void @mubuf_load3(i32 addrspace(1)* %out, i32 addrspace(1)* %in, i64 %offset) { 48 entry: 49 %0 = getelementptr i32, i32 addrspace(1)* %in, i64 %offset 50 %1 = getelementptr i32, i32 addrspace(1)* %0, i64 1 51 %2 = load i32, i32 addrspace(1)* %1 52 store i32 %2, i32 addrspace(1)* %out 53 ret void 54 } 55 56 ; CHECK-LABEL: {{^}}soffset_max_imm: 57 ; CHECK: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 64 offen glc 58 define amdgpu_gs void @soffset_max_imm([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) { 59 main_body: 60 %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 61 %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 62 %tmp2 = shl i32 %6, 2 63 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 64, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) 64 %tmp4 = add i32 %6, 16 65 call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp3, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0) 66 ret void 67 } 68 69 ; Make sure immediates that aren't inline constants don't get folded into 70 ; the soffset operand. 71 ; FIXME: for this test we should be smart enough to shift the immediate into 72 ; the offset field. 73 ; CHECK-LABEL: {{^}}soffset_no_fold: 74 ; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x41 75 ; CHECK: buffer_load_dword v{{[0-9+]}}, v{{[0-9+]}}, s[{{[0-9]+}}:{{[0-9]+}}], [[SOFFSET]] offen glc 76 define amdgpu_gs void @soffset_no_fold([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) { 77 main_body: 78 %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 79 %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 80 %tmp2 = shl i32 %6, 2 81 %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 65, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) 82 %tmp4 = add i32 %6, 16 83 call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp3, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0) 84 ret void 85 } 86 87 ;;;==========================================================================;;; 88 ;;; MUBUF STORE TESTS 89 ;;;==========================================================================;;; 90 91 ; MUBUF store with an immediate byte offset that fits into 12-bits 92 ; CHECK-LABEL: {{^}}mubuf_store0: 93 ; CHECK: buffer_store_dword v{{[0-9]}}, off, s[{{[0-9]:[0-9]}}], 0 offset:4 ; encoding: [0x04,0x00,0x70,0xe0 94 define void @mubuf_store0(i32 addrspace(1)* %out) { 95 entry: 96 %0 = getelementptr i32, i32 addrspace(1)* %out, i64 1 97 store i32 0, i32 addrspace(1)* %0 98 ret void 99 } 100 101 ; MUBUF store with the largest possible immediate offset 102 ; CHECK-LABEL: {{^}}mubuf_store1: 103 ; CHECK: buffer_store_byte v{{[0-9]}}, off, s[{{[0-9]:[0-9]}}], 0 offset:4095 ; encoding: [0xff,0x0f,0x60,0xe0 104 105 define void @mubuf_store1(i8 addrspace(1)* %out) { 106 entry: 107 %0 = getelementptr i8, i8 addrspace(1)* %out, i64 4095 108 store i8 0, i8 addrspace(1)* %0 109 ret void 110 } 111 112 ; MUBUF store with an immediate byte offset that doesn't fit into 12-bits 113 ; CHECK-LABEL: {{^}}mubuf_store2: 114 ; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x1000 115 ; CHECK: buffer_store_dword v{{[0-9]}}, off, s[{{[0-9]:[0-9]}}], [[SOFFSET]] ; encoding: [0x00,0x00,0x70,0xe0 116 define void @mubuf_store2(i32 addrspace(1)* %out) { 117 entry: 118 %0 = getelementptr i32, i32 addrspace(1)* %out, i64 1024 119 store i32 0, i32 addrspace(1)* %0 120 ret void 121 } 122 123 ; MUBUF store with a 12-bit immediate offset and a register offset 124 ; CHECK-LABEL: {{^}}mubuf_store3: 125 ; CHECK-NOT: ADD 126 ; CHECK: buffer_store_dword v{{[0-9]}}, v[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0 addr64 offset:4 ; encoding: [0x04,0x80,0x70,0xe0 127 define void @mubuf_store3(i32 addrspace(1)* %out, i64 %offset) { 128 entry: 129 %0 = getelementptr i32, i32 addrspace(1)* %out, i64 %offset 130 %1 = getelementptr i32, i32 addrspace(1)* %0, i64 1 131 store i32 0, i32 addrspace(1)* %1 132 ret void 133 } 134 135 ; CHECK-LABEL: {{^}}store_sgpr_ptr: 136 ; CHECK: buffer_store_dword v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, 0 137 define void @store_sgpr_ptr(i32 addrspace(1)* %out) #0 { 138 store i32 99, i32 addrspace(1)* %out, align 4 139 ret void 140 } 141 142 ; CHECK-LABEL: {{^}}store_sgpr_ptr_offset: 143 ; CHECK: buffer_store_dword v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:40 144 define void @store_sgpr_ptr_offset(i32 addrspace(1)* %out) #0 { 145 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 10 146 store i32 99, i32 addrspace(1)* %out.gep, align 4 147 ret void 148 } 149 150 ; CHECK-LABEL: {{^}}store_sgpr_ptr_large_offset: 151 ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000 152 ; CHECK: buffer_store_dword v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, [[SOFFSET]] 153 define void @store_sgpr_ptr_large_offset(i32 addrspace(1)* %out) #0 { 154 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 32768 155 store i32 99, i32 addrspace(1)* %out.gep, align 4 156 ret void 157 } 158 159 ; CHECK-LABEL: {{^}}store_sgpr_ptr_large_offset_atomic: 160 ; CHECK: s_mov_b32 [[SOFFSET:s[0-9]+]], 0x20000 161 ; CHECK: buffer_atomic_add v{{[0-9]+}}, off, s{{\[[0-9]+:[0-9]+\]}}, [[SOFFSET]] 162 define void @store_sgpr_ptr_large_offset_atomic(i32 addrspace(1)* %out) #0 { 163 %gep = getelementptr i32, i32 addrspace(1)* %out, i32 32768 164 %val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 5 seq_cst 165 ret void 166 } 167 168 ; CHECK-LABEL: {{^}}store_vgpr_ptr: 169 ; CHECK: buffer_store_dword v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 170 define void @store_vgpr_ptr(i32 addrspace(1)* %out) #0 { 171 %tid = call i32 @llvm.amdgcn.workitem.id.x() readnone 172 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid 173 store i32 99, i32 addrspace(1)* %out.gep, align 4 174 ret void 175 } 176 177 declare i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32) #0 178 declare void @llvm.SI.tbuffer.store.i32(<16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32) 179 180 attributes #0 = { nounwind readonly } 181
