1 ; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8 2 ; pr7167 3 4 define <8 x i8> @f1(<8 x i8> %x) nounwind { 5 %y = shufflevector <8 x i8> %x, <8 x i8> undef, 6 <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 6, i32 7, i32 4, i32 5> 7 ret <8 x i8> %y 8 } 9 10 define <8 x i8> @f2(<8 x i8> %x) nounwind { 11 %y = shufflevector <8 x i8> %x, <8 x i8> undef, 12 <8 x i32> <i32 1, i32 2, i32 0, i32 5, i32 3, i32 6, i32 7, i32 4> 13 ret <8 x i8> %y 14 } 15 16 define void @f3(<4 x i64>* %xp) nounwind { 17 %x = load <4 x i64>, <4 x i64>* %xp 18 %y = shufflevector <4 x i64> %x, <4 x i64> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 19 store <4 x i64> %y, <4 x i64>* %xp 20 ret void 21 } 22
