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      1 ; RUN: llc < %s -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=ARM
      2 ; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=ARM
      3 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s -check-prefix=THUMBTWO
      4 ; RUN: llc < %s -mtriple=thumbv6-apple-ios | FileCheck %s -check-prefix=THUMBONE
      5 ; RUN: llc < %s -mtriple=armv4-apple-ios | FileCheck %s -check-prefix=ARMV4
      6 ; RUN: llc < %s -mtriple=armv6-apple-ios | FileCheck %s -check-prefix=ARMV6
      7 ; RUN: llc < %s -mtriple=thumbv7m-apple-ios | FileCheck %s -check-prefix=THUMBM
      8 
      9 define void @test1(i32* %ptr, i32 %val1) {
     10 ; ARM-LABEL: test1
     11 ; ARM: dmb {{ish$}}
     12 ; ARM-NEXT: str
     13 ; ARM-NEXT: dmb {{ish$}}
     14 ; THUMBONE-LABEL: test1
     15 ; THUMBONE: __sync_lock_test_and_set_4
     16 ; THUMBTWO-LABEL: test1
     17 ; THUMBTWO: dmb {{ish$}}
     18 ; THUMBTWO-NEXT: str
     19 ; THUMBTWO-NEXT: dmb {{ish$}}
     20 ; ARMV6-LABEL: test1
     21 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
     22 ; ARMV6: str
     23 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
     24 ; THUMBM-LABEL: test1
     25 ; THUMBM: dmb sy
     26 ; THUMBM: str
     27 ; THUMBM: dmb sy
     28   store atomic i32 %val1, i32* %ptr seq_cst, align 4
     29   ret void
     30 }
     31 
     32 define i32 @test2(i32* %ptr) {
     33 ; ARM-LABEL: test2
     34 ; ARM: ldr
     35 ; ARM-NEXT: dmb {{ish$}}
     36 ; THUMBONE-LABEL: test2
     37 ; THUMBONE: __sync_val_compare_and_swap_4
     38 ; THUMBTWO-LABEL: test2
     39 ; THUMBTWO: ldr
     40 ; THUMBTWO-NEXT: dmb {{ish$}}
     41 ; ARMV6-LABEL: test2
     42 ; ARMV6: ldr
     43 ; ARMV6: mcr p15, #0, {{r[0-9]*}}, c7, c10, #5
     44 ; THUMBM-LABEL: test2
     45 ; THUMBM: ldr
     46 ; THUMBM: dmb sy
     47   %val = load atomic i32, i32* %ptr seq_cst, align 4
     48   ret i32 %val
     49 }
     50 
     51 define void @test3(i8* %ptr1, i8* %ptr2) {
     52 ; ARM-LABEL: test3
     53 ; ARM-NOT: dmb
     54 ; ARM: ldrb
     55 ; ARM-NOT: dmb
     56 ; ARM: strb
     57 ; ARM-NOT: dmb
     58 ; ARM: bx lr
     59 
     60 ; THUMBTWO-LABEL: test3
     61 ; THUMBTWO-NOT: dmb
     62 ; THUMBTWO: ldrb
     63 ; THUMBTWO-NOT: dmb
     64 ; THUMBTWO: strb
     65 ; THUMBTWO-NOT: dmb
     66 ; THUMBTWO: bx lr
     67 
     68 ; THUMBONE-LABEL: test3
     69 ; THUMBONE-NOT: dmb
     70 ; THUMBONE: ldrb
     71 ; THUMBONE-NOT: dmb
     72 ; THUMBONE: strb
     73 ; THUMBONE-NOT: dmb
     74 
     75 ; ARMV6-LABEL: test3
     76 ; ARMV6-NOT: mcr
     77 ; THUMBM-LABEL: test3
     78 ; THUMBM-NOT: dmb sy
     79   %val = load atomic i8, i8* %ptr1 unordered, align 1
     80   store atomic i8 %val, i8* %ptr2 unordered, align 1
     81   ret void
     82 }
     83 
     84 define void @test4(i8* %ptr1, i8* %ptr2) {
     85 ; THUMBONE-LABEL: test4
     86 ; THUMBONE: ___sync_val_compare_and_swap_1
     87 ; THUMBONE: ___sync_lock_test_and_set_1
     88 ; ARMV6-LABEL: test4
     89 ; THUMBM-LABEL: test4
     90   %val = load atomic i8, i8* %ptr1 seq_cst, align 1
     91   store atomic i8 %val, i8* %ptr2 seq_cst, align 1
     92   ret void
     93 }
     94 
     95 define i64 @test_old_load_64bit(i64* %p) {
     96 ; ARMV4-LABEL: test_old_load_64bit
     97 ; ARMV4: ___sync_val_compare_and_swap_8
     98   %1 = load atomic i64, i64* %p seq_cst, align 8
     99   ret i64 %1
    100 }
    101 
    102 define void @test_old_store_64bit(i64* %p, i64 %v) {
    103 ; ARMV4-LABEL: test_old_store_64bit
    104 ; ARMV4: ___sync_lock_test_and_set_8
    105   store atomic i64 %v, i64* %p seq_cst, align 8
    106   ret void
    107 }
    108