1 ; This tests that MC/asm header conversion is smooth and that the 2 ; build attributes are correct 3 4 ; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11 ; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25 ; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30 ; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE 31 ; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE 32 ; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP 33 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 34 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 35 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 36 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 37 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 38 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 39 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 40 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST 41 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD 42 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST 43 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 44 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 45 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 46 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 47 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 48 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 49 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 51 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 52 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 53 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 54 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 55 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 56 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 57 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 58 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 59 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 60 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 61 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 62 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 63 64 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 65 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 66 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 67 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 68 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 69 70 ; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 71 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0 72 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 73 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 74 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS 75 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 76 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 77 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1 78 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 79 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 80 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 81 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 82 ; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 83 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 84 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 85 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 86 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 87 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 88 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 89 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 90 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 91 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 92 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 93 ; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 94 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 95 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 96 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 97 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 98 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 99 ; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 100 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 101 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 102 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 103 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 104 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 106 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 107 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 108 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8 109 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST 110 ; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 111 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32 112 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST 113 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 114 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 115 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 116 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 117 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 118 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 119 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 120 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 121 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 122 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 123 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 124 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 125 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 126 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73 127 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 128 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1 129 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST 130 ; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 131 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 132 ; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 133 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 134 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 135 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 136 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 137 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 138 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 139 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 140 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 141 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 142 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 143 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 144 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 145 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 146 ; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 147 148 ; ARMv8.1a (AArch32) 149 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 150 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 151 ; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 152 ; ARMv8a (AArch32) 153 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 154 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 155 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 156 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 157 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 158 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 159 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 160 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 161 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 162 ; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 163 164 ; ARMv7a 165 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 166 ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 167 ; ARMv7r 168 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 169 ; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 170 ; ARMv7m 171 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 172 ; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 173 ; ARMv6 174 ; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 175 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 176 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 177 ; ARMv6k 178 ; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 179 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 180 ; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 181 ; ARMv6m 182 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 183 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 184 ; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 185 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 186 ; ARMv5 187 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 188 ; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 189 190 ; XSCALE: .eabi_attribute 6, 5 191 ; XSCALE: .eabi_attribute 8, 1 192 ; XSCALE: .eabi_attribute 9, 1 193 194 ; DYN-ROUNDING: .eabi_attribute 19, 1 195 196 ; V6: .eabi_attribute 6, 6 197 ; V6: .eabi_attribute 8, 1 198 ;; We assume round-to-nearest by default (matches GCC) 199 ; V6-NOT: .eabi_attribute 19 200 ;; The default choice made by llc is for a V6 CPU without an FPU. 201 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 202 ;; software floating-point support. The choice is not important for targets without 203 ;; FPU support! 204 ; V6: .eabi_attribute 20, 1 205 ; V6: .eabi_attribute 21, 1 206 ; V6-NOT: .eabi_attribute 22 207 ; V6: .eabi_attribute 23, 3 208 ; V6: .eabi_attribute 24, 1 209 ; V6: .eabi_attribute 25, 1 210 ; V6-NOT: .eabi_attribute 27 211 ; V6-NOT: .eabi_attribute 28 212 ; V6-NOT: .eabi_attribute 36 213 ; V6: .eabi_attribute 38, 1 214 ; V6-NOT: .eabi_attribute 42 215 ; V6-NOT: .eabi_attribute 44 216 ; V6-NOT: .eabi_attribute 68 217 218 ; V6-FAST-NOT: .eabi_attribute 19 219 ;; Despite the V6 CPU having no FPU by default, we chose to flush to 220 ;; positive zero here. There's no hardware support doing this, but the 221 ;; fast maths software library might. 222 ; V6-FAST-NOT: .eabi_attribute 20 223 ; V6-FAST-NOT: .eabi_attribute 21 224 ; V6-FAST-NOT: .eabi_attribute 22 225 ; V6-FAST: .eabi_attribute 23, 1 226 227 ;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 228 ;; V6-M, however we don't model the OS extension so this is fine. 229 ; V6M: .eabi_attribute 6, 12 230 ; V6M-NOT: .eabi_attribute 7 231 ; V6M: .eabi_attribute 8, 0 232 ; V6M: .eabi_attribute 9, 1 233 ; V6M-NOT: .eabi_attribute 19 234 ;; The default choice made by llc is for a V6M CPU without an FPU. 235 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 236 ;; software floating-point support. The choice is not important for targets without 237 ;; FPU support! 238 ; V6M: .eabi_attribute 20, 1 239 ; V6M: .eabi_attribute 21, 1 240 ; V6M-NOT: .eabi_attribute 22 241 ; V6M: .eabi_attribute 23, 3 242 ; V6M: .eabi_attribute 24, 1 243 ; V6M: .eabi_attribute 25, 1 244 ; V6M-NOT: .eabi_attribute 27 245 ; V6M-NOT: .eabi_attribute 28 246 ; V6M-NOT: .eabi_attribute 36 247 ; V6M: .eabi_attribute 38, 1 248 ; V6M-NOT: .eabi_attribute 42 249 ; V6M-NOT: .eabi_attribute 44 250 ; V6M-NOT: .eabi_attribute 68 251 252 ; V6M-FAST-NOT: .eabi_attribute 19 253 ;; Despite the V6M CPU having no FPU by default, we chose to flush to 254 ;; positive zero here. There's no hardware support doing this, but the 255 ;; fast maths software library might. 256 ; V6M-FAST-NOT: .eabi_attribute 20 257 ; V6M-FAST-NOT: .eabi_attribute 21 258 ; V6M-FAST-NOT: .eabi_attribute 22 259 ; V6M-FAST: .eabi_attribute 23, 1 260 261 ; ARM1156T2F-S: .cpu arm1156t2f-s 262 ; ARM1156T2F-S: .eabi_attribute 6, 8 263 ; ARM1156T2F-S: .eabi_attribute 8, 1 264 ; ARM1156T2F-S: .eabi_attribute 9, 2 265 ; ARM1156T2F-S: .fpu vfpv2 266 ; ARM1156T2F-S-NOT: .eabi_attribute 19 267 ;; We default to IEEE 754 compliance 268 ; ARM1156T2F-S: .eabi_attribute 20, 1 269 ; ARM1156T2F-S: .eabi_attribute 21, 1 270 ; ARM1156T2F-S-NOT: .eabi_attribute 22 271 ; ARM1156T2F-S: .eabi_attribute 23, 3 272 ; ARM1156T2F-S: .eabi_attribute 24, 1 273 ; ARM1156T2F-S: .eabi_attribute 25, 1 274 ; ARM1156T2F-S-NOT: .eabi_attribute 27 275 ; ARM1156T2F-S-NOT: .eabi_attribute 28 276 ; ARM1156T2F-S-NOT: .eabi_attribute 36 277 ; ARM1156T2F-S: .eabi_attribute 38, 1 278 ; ARM1156T2F-S-NOT: .eabi_attribute 42 279 ; ARM1156T2F-S-NOT: .eabi_attribute 44 280 ; ARM1156T2F-S-NOT: .eabi_attribute 68 281 282 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 283 ;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 284 ;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 285 ;; select. LLVM historically picks 0. 286 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 287 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 288 ; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 289 ; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 290 291 ; V7M: .eabi_attribute 6, 10 292 ; V7M: .eabi_attribute 7, 77 293 ; V7M: .eabi_attribute 8, 0 294 ; V7M: .eabi_attribute 9, 2 295 ; V7M-NOT: .eabi_attribute 19 296 ;; The default choice made by llc is for a V7M CPU without an FPU. 297 ;; This is not an interesting detail, but for such CPUs, the default intention is to use 298 ;; software floating-point support. The choice is not important for targets without 299 ;; FPU support! 300 ; V7M: .eabi_attribute 20, 1 301 ; V7M: .eabi_attribute 21, 1 302 ; V7M-NOT: .eabi_attribute 22 303 ; V7M: .eabi_attribute 23, 3 304 ; V7M: .eabi_attribute 24, 1 305 ; V7M: .eabi_attribute 25, 1 306 ; V7M-NOT: .eabi_attribute 27 307 ; V7M-NOT: .eabi_attribute 28 308 ; V7M-NOT: .eabi_attribute 36 309 ; V7M: .eabi_attribute 38, 1 310 ; V7M-NOT: .eabi_attribute 42 311 ; V7M-NOT: .eabi_attribute 44 312 ; V7M-NOT: .eabi_attribute 68 313 314 ; V7M-FAST-NOT: .eabi_attribute 19 315 ;; Despite the V7M CPU having no FPU by default, we chose to flush 316 ;; preserving sign. This matches what the hardware would do in the 317 ;; architecture revision were to exist on the current target. 318 ; V7M-FAST: .eabi_attribute 20, 2 319 ; V7M-FAST-NOT: .eabi_attribute 21 320 ; V7M-FAST-NOT: .eabi_attribute 22 321 ; V7M-FAST: .eabi_attribute 23, 1 322 323 ; V7: .syntax unified 324 ; V7: .eabi_attribute 6, 10 325 ; V7-NOT: .eabi_attribute 19 326 ;; In safe-maths mode we default to an IEEE 754 compliant choice. 327 ; V7: .eabi_attribute 20, 1 328 ; V7: .eabi_attribute 21, 1 329 ; V7-NOT: .eabi_attribute 22 330 ; V7: .eabi_attribute 23, 3 331 ; V7: .eabi_attribute 24, 1 332 ; V7: .eabi_attribute 25, 1 333 ; V7-NOT: .eabi_attribute 27 334 ; V7-NOT: .eabi_attribute 28 335 ; V7-NOT: .eabi_attribute 36 336 ; V7: .eabi_attribute 38, 1 337 ; V7-NOT: .eabi_attribute 42 338 ; V7-NOT: .eabi_attribute 44 339 ; V7-NOT: .eabi_attribute 68 340 341 ; V7-FAST-NOT: .eabi_attribute 19 342 ;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 343 ;; denormals to zero preserving the sign. 344 ; V7-FAST: .eabi_attribute 20, 2 345 ; V7-FAST-NOT: .eabi_attribute 21 346 ; V7-FAST-NOT: .eabi_attribute 22 347 ; V7-FAST: .eabi_attribute 23, 1 348 349 ; V8: .syntax unified 350 ; V8: .eabi_attribute 67, "2.09" 351 ; V8: .eabi_attribute 6, 14 352 ; V8-NOT: .eabi_attribute 19 353 ; V8: .eabi_attribute 20, 1 354 ; V8: .eabi_attribute 21, 1 355 ; V8-NOT: .eabi_attribute 22 356 ; V8: .eabi_attribute 23, 3 357 ; V8-NOT: .eabi_attribute 44 358 359 ; V8-FAST-NOT: .eabi_attribute 19 360 ;; The default does have an FPU, and for V8-A, it flushes preserving sign. 361 ; V8-FAST: .eabi_attribute 20, 2 362 ; V8-FAST-NOT: .eabi_attribute 21 363 ; V8-FAST-NOT: .eabi_attribute 22 364 ; V8-FAST: .eabi_attribute 23, 1 365 366 ; Vt8: .syntax unified 367 ; Vt8: .eabi_attribute 6, 14 368 ; Vt8-NOT: .eabi_attribute 19 369 ; Vt8: .eabi_attribute 20, 1 370 ; Vt8: .eabi_attribute 21, 1 371 ; Vt8-NOT: .eabi_attribute 22 372 ; Vt8: .eabi_attribute 23, 3 373 374 ; V8-FPARMv8: .syntax unified 375 ; V8-FPARMv8: .eabi_attribute 6, 14 376 ; V8-FPARMv8: .fpu fp-armv8 377 378 ; V8-NEON: .syntax unified 379 ; V8-NEON: .eabi_attribute 6, 14 380 ; V8-NEON: .fpu neon 381 ; V8-NEON: .eabi_attribute 12, 3 382 383 ; V8-FPARMv8-NEON: .syntax unified 384 ; V8-FPARMv8-NEON: .eabi_attribute 6, 14 385 ; V8-FPARMv8-NEON: .fpu neon-fp-armv8 386 ; V8-FPARMv8-NEON: .eabi_attribute 12, 3 387 388 ; V8-FPARMv8-NEON-CRYPTO: .syntax unified 389 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 390 ; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 391 ; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 392 393 ; V8MBASELINE: .syntax unified 394 ; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline 395 ; V8MBASELINE: .eabi_attribute 6, 16 396 ; '7' is Tag_CPU_arch_profile, '77' is 'M' 397 ; V8MBASELINE: .eabi_attribute 7, 77 398 ; '8' is Tag_ARM_ISA_use 399 ; V8MBASELINE: .eabi_attribute 8, 0 400 ; '9' is Tag_Thumb_ISA_use 401 ; V8MBASELINE: .eabi_attribute 9, 3 402 403 ; V8MMAINLINE: .syntax unified 404 ; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline 405 ; V8MMAINLINE: .eabi_attribute 6, 17 406 ; V8MMAINLINE: .eabi_attribute 7, 77 407 ; V8MMAINLINE: .eabi_attribute 8, 0 408 ; V8MMAINLINE: .eabi_attribute 9, 3 409 ; V8MMAINLINE_DSP-NOT: .eabi_attribute 46 410 411 ; V8MMAINLINE_DSP: .syntax unified 412 ; V8MBASELINE_DSP: .eabi_attribute 6, 17 413 ; V8MBASELINE_DSP: .eabi_attribute 7, 77 414 ; V8MMAINLINE_DSP: .eabi_attribute 8, 0 415 ; V8MMAINLINE_DSP: .eabi_attribute 9, 3 416 ; V8MMAINLINE_DSP: .eabi_attribute 46, 1 417 418 ; Tag_CPU_unaligned_access 419 ; NO-STRICT-ALIGN: .eabi_attribute 34, 1 420 ; STRICT-ALIGN: .eabi_attribute 34, 0 421 422 ; Tag_CPU_arch 'ARMv7' 423 ; CORTEX-A7-CHECK: .eabi_attribute 6, 10 424 ; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 425 426 ; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 427 428 ; Tag_CPU_arch_profile 'A' 429 ; CORTEX-A7-CHECK: .eabi_attribute 7, 65 430 ; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 431 ; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 432 433 ; Tag_ARM_ISA_use 434 ; CORTEX-A7-CHECK: .eabi_attribute 8, 1 435 ; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 436 ; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 437 438 ; Tag_THUMB_ISA_use 439 ; CORTEX-A7-CHECK: .eabi_attribute 9, 2 440 ; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 441 ; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 442 443 ; CORTEX-A7-CHECK: .fpu neon-vfpv4 444 ; CORTEX-A7-NOFPU-NOT: .fpu 445 ; CORTEX-A7-FPUV4: .fpu vfpv4 446 447 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 448 ; Tag_ABI_FP_denormal 449 ;; We default to IEEE 754 compliance 450 ; CORTEX-A7-CHECK: .eabi_attribute 20, 1 451 ;; The A7 has VFPv3 support by default, so flush preserving sign. 452 ; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 453 ; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 454 ;; Despite there being no FPU, we chose to flush to zero preserving 455 ;; sign. This matches what the hardware would do for this architecture 456 ;; revision. 457 ; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 458 ; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 459 ;; The VFPv4 FPU flushes preserving sign. 460 ; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 461 462 ; Tag_ABI_FP_exceptions 463 ; CORTEX-A7-CHECK: .eabi_attribute 21, 1 464 ; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 465 ; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 466 467 ; Tag_ABI_FP_user_exceptions 468 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 469 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 470 ; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 471 472 ; Tag_ABI_FP_number_model 473 ; CORTEX-A7-CHECK: .eabi_attribute 23, 3 474 ; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 475 ; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 476 477 ; Tag_ABI_align_needed 478 ; CORTEX-A7-CHECK: .eabi_attribute 24, 1 479 ; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 480 ; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 481 482 ; Tag_ABI_align_preserved 483 ; CORTEX-A7-CHECK: .eabi_attribute 25, 1 484 ; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 485 ; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 486 487 ; Tag_FP_HP_extension 488 ; CORTEX-A7-CHECK: .eabi_attribute 36, 1 489 ; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 490 ; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 491 492 ; Tag_FP_16bit_format 493 ; CORTEX-A7-CHECK: .eabi_attribute 38, 1 494 ; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 495 ; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 496 497 ; Tag_MPextension_use 498 ; CORTEX-A7-CHECK: .eabi_attribute 42, 1 499 ; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 500 ; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 501 502 ; Tag_DIV_use 503 ; CORTEX-A7-CHECK: .eabi_attribute 44, 2 504 ; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 505 ; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 506 507 ; Tag_DSP_extension 508 ; CORTEX-A7-CHECK-NOT: .eabi_attribute 46 509 510 ; Tag_Virtualization_use 511 ; CORTEX-A7-CHECK: .eabi_attribute 68, 3 512 ; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 513 ; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 514 515 ; CORTEX-A5-DEFAULT: .cpu cortex-a5 516 ; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 517 ; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 518 ; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 519 ; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 520 ; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 521 ; CORTEX-A5-NOT: .eabi_attribute 19 522 ;; We default to IEEE 754 compliance 523 ; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 524 ; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 525 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 526 ; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 527 ; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 528 ; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 529 ; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 530 ; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 531 ; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 532 533 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 534 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math 535 ;; is given. 536 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 537 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 538 ; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 539 ; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 540 541 ; CORTEX-A5-NONEON: .cpu cortex-a5 542 ; CORTEX-A5-NONEON: .eabi_attribute 6, 10 543 ; CORTEX-A5-NONEON: .eabi_attribute 7, 65 544 ; CORTEX-A5-NONEON: .eabi_attribute 8, 1 545 ; CORTEX-A5-NONEON: .eabi_attribute 9, 2 546 ; CORTEX-A5-NONEON: .fpu vfpv4-d16 547 ;; We default to IEEE 754 compliance 548 ; CORTEX-A5-NONEON: .eabi_attribute 20, 1 549 ; CORTEX-A5-NONEON: .eabi_attribute 21, 1 550 ; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 551 ; CORTEX-A5-NONEON: .eabi_attribute 23, 3 552 ; CORTEX-A5-NONEON: .eabi_attribute 24, 1 553 ; CORTEX-A5-NONEON: .eabi_attribute 25, 1 554 ; CORTEX-A5-NONEON: .eabi_attribute 42, 1 555 ; CORTEX-A5-NONEON: .eabi_attribute 68, 1 556 557 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 558 ;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 559 ;; is given. 560 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 561 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 562 ; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 563 ; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 564 565 ; CORTEX-A5-NOFPU: .cpu cortex-a5 566 ; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 567 ; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 568 ; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 569 ; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 570 ; CORTEX-A5-NOFPU-NOT: .fpu 571 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 572 ;; We default to IEEE 754 compliance 573 ; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 574 ; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 575 ; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 576 ; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 577 ; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 578 ; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 579 ; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 580 ; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 581 582 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 583 ;; Despite there being no FPU, we chose to flush to zero preserving 584 ;; sign. This matches what the hardware would do for this architecture 585 ;; revision. 586 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 587 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 588 ; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 589 ; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 590 591 ; CORTEX-A8-SOFT: .cpu cortex-a8 592 ; CORTEX-A8-SOFT: .eabi_attribute 6, 10 593 ; CORTEX-A8-SOFT: .eabi_attribute 7, 65 594 ; CORTEX-A8-SOFT: .eabi_attribute 8, 1 595 ; CORTEX-A8-SOFT: .eabi_attribute 9, 2 596 ; CORTEX-A8-SOFT: .fpu neon 597 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 19 598 ;; We default to IEEE 754 compliance 599 ; CORTEX-A8-SOFT: .eabi_attribute 20, 1 600 ; CORTEX-A8-SOFT: .eabi_attribute 21, 1 601 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 22 602 ; CORTEX-A8-SOFT: .eabi_attribute 23, 3 603 ; CORTEX-A8-SOFT: .eabi_attribute 24, 1 604 ; CORTEX-A8-SOFT: .eabi_attribute 25, 1 605 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 27 606 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 28 607 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 36, 1 608 ; CORTEX-A8-SOFT: .eabi_attribute 38, 1 609 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 42, 1 610 ; CORTEX-A8-SOFT-NOT: .eabi_attribute 44 611 ; CORTEX-A8-SOFT: .eabi_attribute 68, 1 612 613 ; CORTEX-A9-SOFT: .cpu cortex-a9 614 ; CORTEX-A9-SOFT: .eabi_attribute 6, 10 615 ; CORTEX-A9-SOFT: .eabi_attribute 7, 65 616 ; CORTEX-A9-SOFT: .eabi_attribute 8, 1 617 ; CORTEX-A9-SOFT: .eabi_attribute 9, 2 618 ; CORTEX-A9-SOFT: .fpu neon 619 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 620 ;; We default to IEEE 754 compliance 621 ; CORTEX-A9-SOFT: .eabi_attribute 20, 1 622 ; CORTEX-A9-SOFT: .eabi_attribute 21, 1 623 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 624 ; CORTEX-A9-SOFT: .eabi_attribute 23, 3 625 ; CORTEX-A9-SOFT: .eabi_attribute 24, 1 626 ; CORTEX-A9-SOFT: .eabi_attribute 25, 1 627 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 628 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 629 ; CORTEX-A9-SOFT: .eabi_attribute 36, 1 630 ; CORTEX-A9-SOFT: .eabi_attribute 38, 1 631 ; CORTEX-A9-SOFT: .eabi_attribute 42, 1 632 ; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 633 ; CORTEX-A9-SOFT: .eabi_attribute 68, 1 634 635 ; CORTEX-A8-SOFT-FAST-NOT: .eabi_attribute 19 636 ; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 637 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 638 ;; -ffast-math is specified. 639 ; CORTEX-A8-SOFT-FAST: .eabi_attribute 20, 2 640 ; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 641 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 642 ; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 643 ; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 644 645 ; CORTEX-A8-HARD: .cpu cortex-a8 646 ; CORTEX-A8-HARD: .eabi_attribute 6, 10 647 ; CORTEX-A8-HARD: .eabi_attribute 7, 65 648 ; CORTEX-A8-HARD: .eabi_attribute 8, 1 649 ; CORTEX-A8-HARD: .eabi_attribute 9, 2 650 ; CORTEX-A8-HARD: .fpu neon 651 ; CORTEX-A8-HARD-NOT: .eabi_attribute 19 652 ;; We default to IEEE 754 compliance 653 ; CORTEX-A8-HARD: .eabi_attribute 20, 1 654 ; CORTEX-A8-HARD: .eabi_attribute 21, 1 655 ; CORTEX-A8-HARD-NOT: .eabi_attribute 22 656 ; CORTEX-A8-HARD: .eabi_attribute 23, 3 657 ; CORTEX-A8-HARD: .eabi_attribute 24, 1 658 ; CORTEX-A8-HARD: .eabi_attribute 25, 1 659 ; CORTEX-A8-HARD-NOT: .eabi_attribute 27 660 ; CORTEX-A8-HARD: .eabi_attribute 28, 1 661 ; CORTEX-A8-HARD-NOT: .eabi_attribute 36, 1 662 ; CORTEX-A8-HARD: .eabi_attribute 38, 1 663 ; CORTEX-A8-HARD-NOT: .eabi_attribute 42, 1 664 ; CORTEX-A8-HARD: .eabi_attribute 68, 1 665 666 667 668 ; CORTEX-A9-HARD: .cpu cortex-a9 669 ; CORTEX-A9-HARD: .eabi_attribute 6, 10 670 ; CORTEX-A9-HARD: .eabi_attribute 7, 65 671 ; CORTEX-A9-HARD: .eabi_attribute 8, 1 672 ; CORTEX-A9-HARD: .eabi_attribute 9, 2 673 ; CORTEX-A9-HARD: .fpu neon 674 ; CORTEX-A9-HARD-NOT: .eabi_attribute 19 675 ;; We default to IEEE 754 compliance 676 ; CORTEX-A9-HARD: .eabi_attribute 20, 1 677 ; CORTEX-A9-HARD: .eabi_attribute 21, 1 678 ; CORTEX-A9-HARD-NOT: .eabi_attribute 22 679 ; CORTEX-A9-HARD: .eabi_attribute 23, 3 680 ; CORTEX-A9-HARD: .eabi_attribute 24, 1 681 ; CORTEX-A9-HARD: .eabi_attribute 25, 1 682 ; CORTEX-A9-HARD-NOT: .eabi_attribute 27 683 ; CORTEX-A9-HARD: .eabi_attribute 28, 1 684 ; CORTEX-A9-HARD: .eabi_attribute 36, 1 685 ; CORTEX-A9-HARD: .eabi_attribute 38, 1 686 ; CORTEX-A9-HARD: .eabi_attribute 42, 1 687 ; CORTEX-A9-HARD: .eabi_attribute 68, 1 688 689 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 19 690 ;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when 691 ;; -ffast-math is specified. 692 ; CORTEX-A8-HARD-FAST: .eabi_attribute 20, 2 693 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 21 694 ; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 22 695 ; CORTEX-A8-HARD-FAST: .eabi_attribute 23, 1 696 697 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 698 ;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 699 ;; -ffast-math is specified. 700 ; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 701 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 702 ; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 703 ; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 704 705 ; CORTEX-A12-DEFAULT: .cpu cortex-a12 706 ; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 707 ; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 708 ; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 709 ; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 710 ; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 711 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 712 ;; We default to IEEE 754 compliance 713 ; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 714 ; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 715 ; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 716 ; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 717 ; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 718 ; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 719 ; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 720 ; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 721 ; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 722 723 ; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 724 ;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when 725 ;; -ffast-math is specified. 726 ; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 727 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 728 ; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 729 ; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 730 731 ; CORTEX-A12-NOFPU: .cpu cortex-a12 732 ; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 733 ; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 734 ; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 735 ; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 736 ; CORTEX-A12-NOFPU-NOT: .fpu 737 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 738 ;; We default to IEEE 754 compliance 739 ; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 740 ; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 741 ; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 742 ; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 743 ; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 744 ; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 745 ; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 746 ; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 747 ; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 748 749 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 750 ;; Despite there being no FPU, we chose to flush to zero preserving 751 ;; sign. This matches what the hardware would do for this architecture 752 ;; revision. 753 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 754 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 755 ; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 756 ; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 757 758 ; CORTEX-A15: .cpu cortex-a15 759 ; CORTEX-A15: .eabi_attribute 6, 10 760 ; CORTEX-A15: .eabi_attribute 7, 65 761 ; CORTEX-A15: .eabi_attribute 8, 1 762 ; CORTEX-A15: .eabi_attribute 9, 2 763 ; CORTEX-A15: .fpu neon-vfpv4 764 ; CORTEX-A15-NOT: .eabi_attribute 19 765 ;; We default to IEEE 754 compliance 766 ; CORTEX-A15: .eabi_attribute 20, 1 767 ; CORTEX-A15: .eabi_attribute 21, 1 768 ; CORTEX-A15-NOT: .eabi_attribute 22 769 ; CORTEX-A15: .eabi_attribute 23, 3 770 ; CORTEX-A15: .eabi_attribute 24, 1 771 ; CORTEX-A15: .eabi_attribute 25, 1 772 ; CORTEX-A15-NOT: .eabi_attribute 27 773 ; CORTEX-A15-NOT: .eabi_attribute 28 774 ; CORTEX-A15: .eabi_attribute 36, 1 775 ; CORTEX-A15: .eabi_attribute 38, 1 776 ; CORTEX-A15: .eabi_attribute 42, 1 777 ; CORTEX-A15: .eabi_attribute 44, 2 778 ; CORTEX-A15: .eabi_attribute 68, 3 779 780 ; CORTEX-A15-FAST-NOT: .eabi_attribute 19 781 ;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when 782 ;; -ffast-math is specified. 783 ; CORTEX-A15-FAST: .eabi_attribute 20, 2 784 ; CORTEX-A15-FAST-NOT: .eabi_attribute 21 785 ; CORTEX-A15-FAST-NOT: .eabi_attribute 22 786 ; CORTEX-A15-FAST: .eabi_attribute 23, 1 787 788 ; CORTEX-A17-DEFAULT: .cpu cortex-a17 789 ; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 790 ; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 791 ; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 792 ; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 793 ; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 794 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 795 ;; We default to IEEE 754 compliance 796 ; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 797 ; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 798 ; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 799 ; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 800 ; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 801 ; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 802 ; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 803 ; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 804 ; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 805 806 ; CORTEX-A17-FAST-NOT: .eabi_attribute 19 807 ;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when 808 ;; -ffast-math is specified. 809 ; CORTEX-A17-FAST: .eabi_attribute 20, 2 810 ; CORTEX-A17-FAST-NOT: .eabi_attribute 21 811 ; CORTEX-A17-FAST-NOT: .eabi_attribute 22 812 ; CORTEX-A17-FAST: .eabi_attribute 23, 1 813 814 ; CORTEX-A17-NOFPU: .cpu cortex-a17 815 ; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 816 ; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 817 ; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 818 ; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 819 ; CORTEX-A17-NOFPU-NOT: .fpu 820 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 821 ;; We default to IEEE 754 compliance 822 ; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 823 ; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 824 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 825 ; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 826 ; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 827 ; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 828 ; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 829 ; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 830 ; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 831 832 ; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 833 ;; Despite there being no FPU, we chose to flush to zero preserving 834 ;; sign. This matches what the hardware would do for this architecture 835 ;; revision. 836 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 837 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 838 ; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 839 ; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 840 841 ; CORTEX-M0: .cpu cortex-m0 842 ; CORTEX-M0: .eabi_attribute 6, 12 843 ; CORTEX-M0-NOT: .eabi_attribute 7 844 ; CORTEX-M0: .eabi_attribute 8, 0 845 ; CORTEX-M0: .eabi_attribute 9, 1 846 ; CORTEX-M0-NOT: .eabi_attribute 19 847 ;; We default to IEEE 754 compliance 848 ; CORTEX-M0: .eabi_attribute 20, 1 849 ; CORTEX-M0: .eabi_attribute 21, 1 850 ; CORTEX-M0-NOT: .eabi_attribute 22 851 ; CORTEX-M0: .eabi_attribute 23, 3 852 ; CORTEX-M0: .eabi_attribute 34, 0 853 ; CORTEX-M0: .eabi_attribute 24, 1 854 ; CORTEX-M0: .eabi_attribute 25, 1 855 ; CORTEX-M0-NOT: .eabi_attribute 27 856 ; CORTEX-M0-NOT: .eabi_attribute 28 857 ; CORTEX-M0-NOT: .eabi_attribute 36 858 ; CORTEX-M0: .eabi_attribute 38, 1 859 ; CORTEX-M0-NOT: .eabi_attribute 42 860 ; CORTEX-M0-NOT: .eabi_attribute 44 861 ; CORTEX-M0-NOT: .eabi_attribute 68 862 863 ; CORTEX-M0-FAST-NOT: .eabi_attribute 19 864 ;; Despite the M0 CPU having no FPU in this scenario, we chose to 865 ;; flush to positive zero here. There's no hardware support doing 866 ;; this, but the fast maths software library might and such behaviour 867 ;; would match hardware support on this architecture revision if it 868 ;; existed. 869 ; CORTEX-M0-FAST-NOT: .eabi_attribute 20 870 ; CORTEX-M0-FAST-NOT: .eabi_attribute 21 871 ; CORTEX-M0-FAST-NOT: .eabi_attribute 22 872 ; CORTEX-M0-FAST: .eabi_attribute 23, 1 873 874 ; CORTEX-M0PLUS: .cpu cortex-m0plus 875 ; CORTEX-M0PLUS: .eabi_attribute 6, 12 876 ; CORTEX-M0PLUS-NOT: .eabi_attribute 7 877 ; CORTEX-M0PLUS: .eabi_attribute 8, 0 878 ; CORTEX-M0PLUS: .eabi_attribute 9, 1 879 ; CORTEX-M0PLUS-NOT: .eabi_attribute 19 880 ;; We default to IEEE 754 compliance 881 ; CORTEX-M0PLUS: .eabi_attribute 20, 1 882 ; CORTEX-M0PLUS: .eabi_attribute 21, 1 883 ; CORTEX-M0PLUS-NOT: .eabi_attribute 22 884 ; CORTEX-M0PLUS: .eabi_attribute 23, 3 885 ; CORTEX-M0PLUS: .eabi_attribute 24, 1 886 ; CORTEX-M0PLUS: .eabi_attribute 25, 1 887 ; CORTEX-M0PLUS-NOT: .eabi_attribute 27 888 ; CORTEX-M0PLUS-NOT: .eabi_attribute 28 889 ; CORTEX-M0PLUS-NOT: .eabi_attribute 36 890 ; CORTEX-M0PLUS: .eabi_attribute 38, 1 891 ; CORTEX-M0PLUS-NOT: .eabi_attribute 42 892 ; CORTEX-M0PLUS-NOT: .eabi_attribute 44 893 ; CORTEX-M0PLUS-NOT: .eabi_attribute 68 894 895 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 896 ;; Despite the M0+ CPU having no FPU in this scenario, we chose to 897 ;; flush to positive zero here. There's no hardware support doing 898 ;; this, but the fast maths software library might and such behaviour 899 ;; would match hardware support on this architecture revision if it 900 ;; existed. 901 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 902 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 903 ; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 904 ; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 905 906 ; CORTEX-M1: .cpu cortex-m1 907 ; CORTEX-M1: .eabi_attribute 6, 12 908 ; CORTEX-M1-NOT: .eabi_attribute 7 909 ; CORTEX-M1: .eabi_attribute 8, 0 910 ; CORTEX-M1: .eabi_attribute 9, 1 911 ; CORTEX-M1-NOT: .eabi_attribute 19 912 ;; We default to IEEE 754 compliance 913 ; CORTEX-M1: .eabi_attribute 20, 1 914 ; CORTEX-M1: .eabi_attribute 21, 1 915 ; CORTEX-M1-NOT: .eabi_attribute 22 916 ; CORTEX-M1: .eabi_attribute 23, 3 917 ; CORTEX-M1: .eabi_attribute 24, 1 918 ; CORTEX-M1: .eabi_attribute 25, 1 919 ; CORTEX-M1-NOT: .eabi_attribute 27 920 ; CORTEX-M1-NOT: .eabi_attribute 28 921 ; CORTEX-M1-NOT: .eabi_attribute 36 922 ; CORTEX-M1: .eabi_attribute 38, 1 923 ; CORTEX-M1-NOT: .eabi_attribute 42 924 ; CORTEX-M1-NOT: .eabi_attribute 44 925 ; CORTEX-M1-NOT: .eabi_attribute 68 926 927 ; CORTEX-M1-FAST-NOT: .eabi_attribute 19 928 ;; Despite the M1 CPU having no FPU in this scenario, we chose to 929 ;; flush to positive zero here. There's no hardware support doing 930 ;; this, but the fast maths software library might and such behaviour 931 ;; would match hardware support on this architecture revision if it 932 ;; existed. 933 ; CORTEX-M1-FAST-NOT: .eabi_attribute 20 934 ; CORTEX-M1-FAST-NOT: .eabi_attribute 21 935 ; CORTEX-M1-FAST-NOT: .eabi_attribute 22 936 ; CORTEX-M1-FAST: .eabi_attribute 23, 1 937 938 ; SC000: .cpu sc000 939 ; SC000: .eabi_attribute 6, 12 940 ; SC000-NOT: .eabi_attribute 7 941 ; SC000: .eabi_attribute 8, 0 942 ; SC000: .eabi_attribute 9, 1 943 ; SC000-NOT: .eabi_attribute 19 944 ;; We default to IEEE 754 compliance 945 ; SC000: .eabi_attribute 20, 1 946 ; SC000: .eabi_attribute 21, 1 947 ; SC000-NOT: .eabi_attribute 22 948 ; SC000: .eabi_attribute 23, 3 949 ; SC000: .eabi_attribute 24, 1 950 ; SC000: .eabi_attribute 25, 1 951 ; SC000-NOT: .eabi_attribute 27 952 ; SC000-NOT: .eabi_attribute 28 953 ; SC000-NOT: .eabi_attribute 36 954 ; SC000: .eabi_attribute 38, 1 955 ; SC000-NOT: .eabi_attribute 42 956 ; SC000-NOT: .eabi_attribute 44 957 ; SC000-NOT: .eabi_attribute 68 958 959 ; SC000-FAST-NOT: .eabi_attribute 19 960 ;; Despite the SC000 CPU having no FPU in this scenario, we chose to 961 ;; flush to positive zero here. There's no hardware support doing 962 ;; this, but the fast maths software library might and such behaviour 963 ;; would match hardware support on this architecture revision if it 964 ;; existed. 965 ; SC000-FAST-NOT: .eabi_attribute 20 966 ; SC000-FAST-NOT: .eabi_attribute 21 967 ; SC000-FAST-NOT: .eabi_attribute 22 968 ; SC000-FAST: .eabi_attribute 23, 1 969 970 ; CORTEX-M3: .cpu cortex-m3 971 ; CORTEX-M3: .eabi_attribute 6, 10 972 ; CORTEX-M3: .eabi_attribute 7, 77 973 ; CORTEX-M3: .eabi_attribute 8, 0 974 ; CORTEX-M3: .eabi_attribute 9, 2 975 ; CORTEX-M3-NOT: .eabi_attribute 19 976 ;; We default to IEEE 754 compliance 977 ; CORTEX-M3: .eabi_attribute 20, 1 978 ; CORTEX-M3: .eabi_attribute 21, 1 979 ; CORTEX-M3-NOT: .eabi_attribute 22 980 ; CORTEX-M3: .eabi_attribute 23, 3 981 ; CORTEX-M3: .eabi_attribute 24, 1 982 ; CORTEX-M3: .eabi_attribute 25, 1 983 ; CORTEX-M3-NOT: .eabi_attribute 27 984 ; CORTEX-M3-NOT: .eabi_attribute 28 985 ; CORTEX-M3-NOT: .eabi_attribute 36 986 ; CORTEX-M3: .eabi_attribute 38, 1 987 ; CORTEX-M3-NOT: .eabi_attribute 42 988 ; CORTEX-M3-NOT: .eabi_attribute 44 989 ; CORTEX-M3-NOT: .eabi_attribute 68 990 991 ; CORTEX-M3-FAST-NOT: .eabi_attribute 19 992 ;; Despite there being no FPU, we chose to flush to zero preserving 993 ;; sign. This matches what the hardware would do for this architecture 994 ;; revision. 995 ; CORTEX-M3-FAST: .eabi_attribute 20, 2 996 ; CORTEX-M3-FAST-NOT: .eabi_attribute 21 997 ; CORTEX-M3-FAST-NOT: .eabi_attribute 22 998 ; CORTEX-M3-FAST: .eabi_attribute 23, 1 999 1000 ; SC300: .cpu sc300 1001 ; SC300: .eabi_attribute 6, 10 1002 ; SC300: .eabi_attribute 7, 77 1003 ; SC300: .eabi_attribute 8, 0 1004 ; SC300: .eabi_attribute 9, 2 1005 ; SC300-NOT: .eabi_attribute 19 1006 ;; We default to IEEE 754 compliance 1007 ; SC300: .eabi_attribute 20, 1 1008 ; SC300: .eabi_attribute 21, 1 1009 ; SC300-NOT: .eabi_attribute 22 1010 ; SC300: .eabi_attribute 23, 3 1011 ; SC300: .eabi_attribute 24, 1 1012 ; SC300: .eabi_attribute 25, 1 1013 ; SC300-NOT: .eabi_attribute 27 1014 ; SC300-NOT: .eabi_attribute 28 1015 ; SC300-NOT: .eabi_attribute 36 1016 ; SC300: .eabi_attribute 38, 1 1017 ; SC300-NOT: .eabi_attribute 42 1018 ; SC300-NOT: .eabi_attribute 44 1019 ; SC300-NOT: .eabi_attribute 68 1020 1021 ; SC300-FAST-NOT: .eabi_attribute 19 1022 ;; Despite there being no FPU, we chose to flush to zero preserving 1023 ;; sign. This matches what the hardware would do for this architecture 1024 ;; revision. 1025 ; SC300-FAST: .eabi_attribute 20, 2 1026 ; SC300-FAST-NOT: .eabi_attribute 21 1027 ; SC300-FAST-NOT: .eabi_attribute 22 1028 ; SC300-FAST: .eabi_attribute 23, 1 1029 1030 ; CORTEX-M4-SOFT: .cpu cortex-m4 1031 ; CORTEX-M4-SOFT: .eabi_attribute 6, 13 1032 ; CORTEX-M4-SOFT: .eabi_attribute 7, 77 1033 ; CORTEX-M4-SOFT: .eabi_attribute 8, 0 1034 ; CORTEX-M4-SOFT: .eabi_attribute 9, 2 1035 ; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 1036 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 1037 ;; We default to IEEE 754 compliance 1038 ; CORTEX-M4-SOFT: .eabi_attribute 20, 1 1039 ; CORTEX-M4-SOFT: .eabi_attribute 21, 1 1040 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 1041 ; CORTEX-M4-SOFT: .eabi_attribute 23, 3 1042 ; CORTEX-M4-SOFT: .eabi_attribute 24, 1 1043 ; CORTEX-M4-SOFT: .eabi_attribute 25, 1 1044 ; CORTEX-M4-SOFT: .eabi_attribute 27, 1 1045 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 1046 ; CORTEX-M4-SOFT: .eabi_attribute 36, 1 1047 ; CORTEX-M4-SOFT: .eabi_attribute 38, 1 1048 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 1049 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 1050 ; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 1051 1052 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 1053 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1054 ;; -ffast-math is specified. 1055 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 1056 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 1057 ; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 1058 ; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 1059 1060 ; CORTEX-M4-HARD: .cpu cortex-m4 1061 ; CORTEX-M4-HARD: .eabi_attribute 6, 13 1062 ; CORTEX-M4-HARD: .eabi_attribute 7, 77 1063 ; CORTEX-M4-HARD: .eabi_attribute 8, 0 1064 ; CORTEX-M4-HARD: .eabi_attribute 9, 2 1065 ; CORTEX-M4-HARD: .fpu fpv4-sp-d16 1066 ; CORTEX-M4-HARD-NOT: .eabi_attribute 19 1067 ;; We default to IEEE 754 compliance 1068 ; CORTEX-M4-HARD: .eabi_attribute 20, 1 1069 ; CORTEX-M4-HARD: .eabi_attribute 21, 1 1070 ; CORTEX-M4-HARD-NOT: .eabi_attribute 22 1071 ; CORTEX-M4-HARD: .eabi_attribute 23, 3 1072 ; CORTEX-M4-HARD: .eabi_attribute 24, 1 1073 ; CORTEX-M4-HARD: .eabi_attribute 25, 1 1074 ; CORTEX-M4-HARD: .eabi_attribute 27, 1 1075 ; CORTEX-M4-HARD: .eabi_attribute 28, 1 1076 ; CORTEX-M4-HARD: .eabi_attribute 36, 1 1077 ; CORTEX-M4-HARD: .eabi_attribute 38, 1 1078 ; CORTEX-M4-HARD-NOT: .eabi_attribute 42 1079 ; CORTEX-M4-HARD-NOT: .eabi_attribute 44 1080 ; CORTEX-M4-HARD-NOT: .eabi_attribute 68 1081 1082 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 1083 ;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1084 ;; -ffast-math is specified. 1085 ; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 1086 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 1087 ; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 1088 ; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 1089 1090 ; CORTEX-M7: .cpu cortex-m7 1091 ; CORTEX-M7: .eabi_attribute 6, 13 1092 ; CORTEX-M7: .eabi_attribute 7, 77 1093 ; CORTEX-M7: .eabi_attribute 8, 0 1094 ; CORTEX-M7: .eabi_attribute 9, 2 1095 ; CORTEX-M7-SOFT-NOT: .fpu 1096 ; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 1097 ; CORTEX-M7-DOUBLE: .fpu fpv5-d16 1098 ; CORTEX-M7: .eabi_attribute 17, 1 1099 ; CORTEX-M7-NOT: .eabi_attribute 19 1100 ;; We default to IEEE 754 compliance 1101 ; CORTEX-M7: .eabi_attribute 20, 1 1102 ; CORTEX-M7: .eabi_attribute 21, 1 1103 ; CORTEX-M7-NOT: .eabi_attribute 22 1104 ; CORTEX-M7: .eabi_attribute 23, 3 1105 ; CORTEX-M7: .eabi_attribute 24, 1 1106 ; CORTEX-M7: .eabi_attribute 25, 1 1107 ; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1108 ; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1109 ; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1110 ; CORTEX-M7: .eabi_attribute 36, 1 1111 ; CORTEX-M7: .eabi_attribute 38, 1 1112 ; CORTEX-M7-NOT: .eabi_attribute 44 1113 ; CORTEX-M7: .eabi_attribute 14, 0 1114 1115 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1116 ;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1117 ; CORTEX-M7-FAST: .eabi_attribute 20, 2 1118 ;; Despite there being no FPU, we chose to flush to zero preserving 1119 ;; sign. This matches what the hardware would do for this architecture 1120 ;; revision. 1121 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1122 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1123 ; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1124 ; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1125 1126 ; CORTEX-R4: .cpu cortex-r4 1127 ; CORTEX-R4: .eabi_attribute 6, 10 1128 ; CORTEX-R4: .eabi_attribute 7, 82 1129 ; CORTEX-R4: .eabi_attribute 8, 1 1130 ; CORTEX-R4: .eabi_attribute 9, 2 1131 ; CORTEX-R4-NOT: .fpu vfpv3-d16 1132 ; CORTEX-R4-NOT: .eabi_attribute 19 1133 ;; We default to IEEE 754 compliance 1134 ; CORTEX-R4: .eabi_attribute 20, 1 1135 ; CORTEX-R4: .eabi_attribute 21, 1 1136 ; CORTEX-R4-NOT: .eabi_attribute 22 1137 ; CORTEX-R4: .eabi_attribute 23, 3 1138 ; CORTEX-R4: .eabi_attribute 24, 1 1139 ; CORTEX-R4: .eabi_attribute 25, 1 1140 ; CORTEX-R4-NOT: .eabi_attribute 28 1141 ; CORTEX-R4-NOT: .eabi_attribute 36 1142 ; CORTEX-R4: .eabi_attribute 38, 1 1143 ; CORTEX-R4-NOT: .eabi_attribute 42 1144 ; CORTEX-R4-NOT: .eabi_attribute 44 1145 ; CORTEX-R4-NOT: .eabi_attribute 68 1146 1147 ; CORTEX-R4F: .cpu cortex-r4f 1148 ; CORTEX-R4F: .eabi_attribute 6, 10 1149 ; CORTEX-R4F: .eabi_attribute 7, 82 1150 ; CORTEX-R4F: .eabi_attribute 8, 1 1151 ; CORTEX-R4F: .eabi_attribute 9, 2 1152 ; CORTEX-R4F: .fpu vfpv3-d16 1153 ; CORTEX-R4F-NOT: .eabi_attribute 19 1154 ;; We default to IEEE 754 compliance 1155 ; CORTEX-R4F: .eabi_attribute 20, 1 1156 ; CORTEX-R4F: .eabi_attribute 21, 1 1157 ; CORTEX-R4F-NOT: .eabi_attribute 22 1158 ; CORTEX-R4F: .eabi_attribute 23, 3 1159 ; CORTEX-R4F: .eabi_attribute 24, 1 1160 ; CORTEX-R4F: .eabi_attribute 25, 1 1161 ; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1162 ; CORTEX-R4F-NOT: .eabi_attribute 28 1163 ; CORTEX-R4F-NOT: .eabi_attribute 36 1164 ; CORTEX-R4F: .eabi_attribute 38, 1 1165 ; CORTEX-R4F-NOT: .eabi_attribute 42 1166 ; CORTEX-R4F-NOT: .eabi_attribute 44 1167 ; CORTEX-R4F-NOT: .eabi_attribute 68 1168 1169 ; CORTEX-R5: .cpu cortex-r5 1170 ; CORTEX-R5: .eabi_attribute 6, 10 1171 ; CORTEX-R5: .eabi_attribute 7, 82 1172 ; CORTEX-R5: .eabi_attribute 8, 1 1173 ; CORTEX-R5: .eabi_attribute 9, 2 1174 ; CORTEX-R5: .fpu vfpv3-d16 1175 ; CORTEX-R5-NOT: .eabi_attribute 19 1176 ;; We default to IEEE 754 compliance 1177 ; CORTEX-R5: .eabi_attribute 20, 1 1178 ; CORTEX-R5: .eabi_attribute 21, 1 1179 ; CORTEX-R5-NOT: .eabi_attribute 22 1180 ; CORTEX-R5: .eabi_attribute 23, 3 1181 ; CORTEX-R5: .eabi_attribute 24, 1 1182 ; CORTEX-R5: .eabi_attribute 25, 1 1183 ; CORTEX-R5-NOT: .eabi_attribute 27, 1 1184 ; CORTEX-R5-NOT: .eabi_attribute 28 1185 ; CORTEX-R5-NOT: .eabi_attribute 36 1186 ; CORTEX-R5: .eabi_attribute 38, 1 1187 ; CORTEX-R5-NOT: .eabi_attribute 42 1188 ; CORTEX-R5: .eabi_attribute 44, 2 1189 ; CORTEX-R5-NOT: .eabi_attribute 68 1190 1191 ; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1192 ;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1193 ; CORTEX-R5-FAST: .eabi_attribute 20, 2 1194 ; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1195 ; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1196 ; CORTEX-R5-FAST: .eabi_attribute 23, 1 1197 1198 ; CORTEX-R7: .cpu cortex-r7 1199 ; CORTEX-R7: .eabi_attribute 6, 10 1200 ; CORTEX-R7: .eabi_attribute 7, 82 1201 ; CORTEX-R7: .eabi_attribute 8, 1 1202 ; CORTEX-R7: .eabi_attribute 9, 2 1203 ; CORTEX-R7: .fpu vfpv3-d16-fp16 1204 ; CORTEX-R7-NOT: .eabi_attribute 19 1205 ;; We default to IEEE 754 compliance 1206 ; CORTEX-R7: .eabi_attribute 20, 1 1207 ; CORTEX-R7: .eabi_attribute 21, 1 1208 ; CORTEX-R7-NOT: .eabi_attribute 22 1209 ; CORTEX-R7: .eabi_attribute 23, 3 1210 ; CORTEX-R7: .eabi_attribute 24, 1 1211 ; CORTEX-R7: .eabi_attribute 25, 1 1212 ; CORTEX-R7-NOT: .eabi_attribute 28 1213 ; CORTEX-R7: .eabi_attribute 36, 1 1214 ; CORTEX-R7: .eabi_attribute 38, 1 1215 ; CORTEX-R7: .eabi_attribute 42, 1 1216 ; CORTEX-R7: .eabi_attribute 44, 2 1217 ; CORTEX-R7-NOT: .eabi_attribute 68 1218 1219 ; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1220 ;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1221 ; CORTEX-R7-FAST: .eabi_attribute 20, 2 1222 ; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1223 ; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1224 ; CORTEX-R7-FAST: .eabi_attribute 23, 1 1225 1226 ; CORTEX-R8: .cpu cortex-r8 1227 ; CORTEX-R8: .eabi_attribute 6, 10 1228 ; CORTEX-R8: .eabi_attribute 7, 82 1229 ; CORTEX-R8: .eabi_attribute 8, 1 1230 ; CORTEX-R8: .eabi_attribute 9, 2 1231 ; CORTEX-R8: .fpu vfpv3-d16-fp16 1232 ; CORTEX-R8-NOT: .eabi_attribute 19 1233 ;; We default to IEEE 754 compliance 1234 ; CORTEX-R8: .eabi_attribute 20, 1 1235 ; CORTEX-R8: .eabi_attribute 21, 1 1236 ; CORTEX-R8-NOT: .eabi_attribute 22 1237 ; CORTEX-R8: .eabi_attribute 23, 3 1238 ; CORTEX-R8: .eabi_attribute 24, 1 1239 ; CORTEX-R8: .eabi_attribute 25, 1 1240 ; CORTEX-R8-NOT: .eabi_attribute 28 1241 ; CORTEX-R8: .eabi_attribute 36, 1 1242 ; CORTEX-R8: .eabi_attribute 38, 1 1243 ; CORTEX-R8: .eabi_attribute 42, 1 1244 ; CORTEX-R8: .eabi_attribute 44, 2 1245 ; CORTEX-R8-NOT: .eabi_attribute 68 1246 1247 ; CORTEX-R8-FAST-NOT: .eabi_attribute 19 1248 ;; The R8 has the VFPv3 FP unit, which always flushes preserving sign. 1249 ; CORTEX-R8-FAST: .eabi_attribute 20, 2 1250 ; CORTEX-R8-FAST-NOT: .eabi_attribute 21 1251 ; CORTEX-R8-FAST-NOT: .eabi_attribute 22 1252 ; CORTEX-R8-FAST: .eabi_attribute 23, 1 1253 1254 ; CORTEX-A32: .cpu cortex-a32 1255 ; CORTEX-A32: .eabi_attribute 6, 14 1256 ; CORTEX-A32: .eabi_attribute 7, 65 1257 ; CORTEX-A32: .eabi_attribute 8, 1 1258 ; CORTEX-A32: .eabi_attribute 9, 2 1259 ; CORTEX-A32: .fpu crypto-neon-fp-armv8 1260 ; CORTEX-A32: .eabi_attribute 12, 3 1261 ; CORTEX-A32-NOT: .eabi_attribute 19 1262 ;; We default to IEEE 754 compliance 1263 ; CORTEX-A32: .eabi_attribute 20, 1 1264 ; CORTEX-A32: .eabi_attribute 21, 1 1265 ; CORTEX-A32-NOT: .eabi_attribute 22 1266 ; CORTEX-A32: .eabi_attribute 23, 3 1267 ; CORTEX-A32: .eabi_attribute 24, 1 1268 ; CORTEX-A32: .eabi_attribute 25, 1 1269 ; CORTEX-A32-NOT: .eabi_attribute 27 1270 ; CORTEX-A32-NOT: .eabi_attribute 28 1271 ; CORTEX-A32: .eabi_attribute 36, 1 1272 ; CORTEX-A32: .eabi_attribute 38, 1 1273 ; CORTEX-A32: .eabi_attribute 42, 1 1274 ; CORTEX-A32-NOT: .eabi_attribute 44 1275 ; CORTEX-A32: .eabi_attribute 68, 3 1276 1277 ; CORTEX-A32-FAST-NOT: .eabi_attribute 19 1278 ;; The A32 has the ARMv8 FP unit, which always flushes preserving sign. 1279 ; CORTEX-A32-FAST: .eabi_attribute 20, 2 1280 ; CORTEX-A32-FAST-NOT: .eabi_attribute 21 1281 ; CORTEX-A32-FAST-NOT: .eabi_attribute 22 1282 ; CORTEX-A32-FAST: .eabi_attribute 23, 1 1283 1284 ; CORTEX-A35: .cpu cortex-a35 1285 ; CORTEX-A35: .eabi_attribute 6, 14 1286 ; CORTEX-A35: .eabi_attribute 7, 65 1287 ; CORTEX-A35: .eabi_attribute 8, 1 1288 ; CORTEX-A35: .eabi_attribute 9, 2 1289 ; CORTEX-A35: .fpu crypto-neon-fp-armv8 1290 ; CORTEX-A35: .eabi_attribute 12, 3 1291 ; CORTEX-A35-NOT: .eabi_attribute 19 1292 ;; We default to IEEE 754 compliance 1293 ; CORTEX-A35: .eabi_attribute 20, 1 1294 ; CORTEX-A35: .eabi_attribute 21, 1 1295 ; CORTEX-A35-NOT: .eabi_attribute 22 1296 ; CORTEX-A35: .eabi_attribute 23, 3 1297 ; CORTEX-A35: .eabi_attribute 24, 1 1298 ; CORTEX-A35: .eabi_attribute 25, 1 1299 ; CORTEX-A35-NOT: .eabi_attribute 27 1300 ; CORTEX-A35-NOT: .eabi_attribute 28 1301 ; CORTEX-A35: .eabi_attribute 36, 1 1302 ; CORTEX-A35: .eabi_attribute 38, 1 1303 ; CORTEX-A35: .eabi_attribute 42, 1 1304 ; CORTEX-A35-NOT: .eabi_attribute 44 1305 ; CORTEX-A35: .eabi_attribute 68, 3 1306 1307 ; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1308 ;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1309 ; CORTEX-A35-FAST: .eabi_attribute 20, 2 1310 ; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1311 ; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1312 ; CORTEX-A35-FAST: .eabi_attribute 23, 1 1313 1314 ; CORTEX-A53: .cpu cortex-a53 1315 ; CORTEX-A53: .eabi_attribute 6, 14 1316 ; CORTEX-A53: .eabi_attribute 7, 65 1317 ; CORTEX-A53: .eabi_attribute 8, 1 1318 ; CORTEX-A53: .eabi_attribute 9, 2 1319 ; CORTEX-A53: .fpu crypto-neon-fp-armv8 1320 ; CORTEX-A53: .eabi_attribute 12, 3 1321 ; CORTEX-A53-NOT: .eabi_attribute 19 1322 ;; We default to IEEE 754 compliance 1323 ; CORTEX-A53: .eabi_attribute 20, 1 1324 ; CORTEX-A53: .eabi_attribute 21, 1 1325 ; CORTEX-A53-NOT: .eabi_attribute 22 1326 ; CORTEX-A53: .eabi_attribute 23, 3 1327 ; CORTEX-A53: .eabi_attribute 24, 1 1328 ; CORTEX-A53: .eabi_attribute 25, 1 1329 ; CORTEX-A53-NOT: .eabi_attribute 27 1330 ; CORTEX-A53-NOT: .eabi_attribute 28 1331 ; CORTEX-A53: .eabi_attribute 36, 1 1332 ; CORTEX-A53: .eabi_attribute 38, 1 1333 ; CORTEX-A53: .eabi_attribute 42, 1 1334 ; CORTEX-A53-NOT: .eabi_attribute 44 1335 ; CORTEX-A53: .eabi_attribute 68, 3 1336 1337 ; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1338 ;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1339 ; CORTEX-A53-FAST: .eabi_attribute 20, 2 1340 ; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1341 ; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1342 ; CORTEX-A53-FAST: .eabi_attribute 23, 1 1343 1344 ; CORTEX-A57: .cpu cortex-a57 1345 ; CORTEX-A57: .eabi_attribute 6, 14 1346 ; CORTEX-A57: .eabi_attribute 7, 65 1347 ; CORTEX-A57: .eabi_attribute 8, 1 1348 ; CORTEX-A57: .eabi_attribute 9, 2 1349 ; CORTEX-A57: .fpu crypto-neon-fp-armv8 1350 ; CORTEX-A57: .eabi_attribute 12, 3 1351 ; CORTEX-A57-NOT: .eabi_attribute 19 1352 ;; We default to IEEE 754 compliance 1353 ; CORTEX-A57: .eabi_attribute 20, 1 1354 ; CORTEX-A57: .eabi_attribute 21, 1 1355 ; CORTEX-A57-NOT: .eabi_attribute 22 1356 ; CORTEX-A57: .eabi_attribute 23, 3 1357 ; CORTEX-A57: .eabi_attribute 24, 1 1358 ; CORTEX-A57: .eabi_attribute 25, 1 1359 ; CORTEX-A57-NOT: .eabi_attribute 27 1360 ; CORTEX-A57-NOT: .eabi_attribute 28 1361 ; CORTEX-A57: .eabi_attribute 36, 1 1362 ; CORTEX-A57: .eabi_attribute 38, 1 1363 ; CORTEX-A57: .eabi_attribute 42, 1 1364 ; CORTEX-A57-NOT: .eabi_attribute 44 1365 ; CORTEX-A57: .eabi_attribute 68, 3 1366 1367 ; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1368 ;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1369 ; CORTEX-A57-FAST: .eabi_attribute 20, 2 1370 ; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1371 ; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1372 ; CORTEX-A57-FAST: .eabi_attribute 23, 1 1373 1374 ; CORTEX-A72: .cpu cortex-a72 1375 ; CORTEX-A72: .eabi_attribute 6, 14 1376 ; CORTEX-A72: .eabi_attribute 7, 65 1377 ; CORTEX-A72: .eabi_attribute 8, 1 1378 ; CORTEX-A72: .eabi_attribute 9, 2 1379 ; CORTEX-A72: .fpu crypto-neon-fp-armv8 1380 ; CORTEX-A72: .eabi_attribute 12, 3 1381 ; CORTEX-A72-NOT: .eabi_attribute 19 1382 ;; We default to IEEE 754 compliance 1383 ; CORTEX-A72: .eabi_attribute 20, 1 1384 ; CORTEX-A72: .eabi_attribute 21, 1 1385 ; CORTEX-A72-NOT: .eabi_attribute 22 1386 ; CORTEX-A72: .eabi_attribute 23, 3 1387 ; CORTEX-A72: .eabi_attribute 24, 1 1388 ; CORTEX-A72: .eabi_attribute 25, 1 1389 ; CORTEX-A72-NOT: .eabi_attribute 27 1390 ; CORTEX-A72-NOT: .eabi_attribute 28 1391 ; CORTEX-A72: .eabi_attribute 36, 1 1392 ; CORTEX-A72: .eabi_attribute 38, 1 1393 ; CORTEX-A72: .eabi_attribute 42, 1 1394 ; CORTEX-A72-NOT: .eabi_attribute 44 1395 ; CORTEX-A72: .eabi_attribute 68, 3 1396 1397 ; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1398 ;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1399 ; CORTEX-A72-FAST: .eabi_attribute 20, 2 1400 ; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1401 ; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1402 ; CORTEX-A72-FAST: .eabi_attribute 23, 1 1403 1404 ; CORTEX-A73: .cpu cortex-a73 1405 ; CORTEX-A73: .eabi_attribute 6, 14 1406 ; CORTEX-A73: .eabi_attribute 7, 65 1407 ; CORTEX-A73: .eabi_attribute 8, 1 1408 ; CORTEX-A73: .eabi_attribute 9, 2 1409 ; CORTEX-A73: .fpu crypto-neon-fp-armv8 1410 ; CORTEX-A73: .eabi_attribute 12, 3 1411 ; CORTEX-A73-NOT: .eabi_attribute 19 1412 ;; We default to IEEE 754 compliance 1413 ; CORTEX-A73: .eabi_attribute 20, 1 1414 ; CORTEX-A73: .eabi_attribute 21, 1 1415 ; CORTEX-A73-NOT: .eabi_attribute 22 1416 ; CORTEX-A73: .eabi_attribute 23, 3 1417 ; CORTEX-A73: .eabi_attribute 24, 1 1418 ; CORTEX-A73: .eabi_attribute 25, 1 1419 ; CORTEX-A73-NOT: .eabi_attribute 27 1420 ; CORTEX-A73-NOT: .eabi_attribute 28 1421 ; CORTEX-A73: .eabi_attribute 36, 1 1422 ; CORTEX-A73: .eabi_attribute 38, 1 1423 ; CORTEX-A73: .eabi_attribute 42, 1 1424 ; CORTEX-A73-NOT: .eabi_attribute 44 1425 ; CORTEX-A73: .eabi_attribute 14, 0 1426 ; CORTEX-A73: .eabi_attribute 68, 3 1427 1428 ; EXYNOS-M1: .cpu exynos-m1 1429 ; EXYNOS-M1: .eabi_attribute 6, 14 1430 ; EXYNOS-M1: .eabi_attribute 7, 65 1431 ; EXYNOS-M1: .eabi_attribute 8, 1 1432 ; EXYNOS-M1: .eabi_attribute 9, 2 1433 ; EXYNOS-M1: .fpu crypto-neon-fp-armv8 1434 ; EXYNOS-M1: .eabi_attribute 12, 3 1435 ; EXYNOS-M1-NOT: .eabi_attribute 19 1436 ;; We default to IEEE 754 compliance 1437 ; EXYNOS-M1: .eabi_attribute 20, 1 1438 ; EXYNOS-M1: .eabi_attribute 21, 1 1439 ; EXYNOS-M1-NOT: .eabi_attribute 22 1440 ; EXYNOS-M1: .eabi_attribute 23, 3 1441 ; EXYNOS-M1: .eabi_attribute 24, 1 1442 ; EXYNOS-M1: .eabi_attribute 25, 1 1443 ; EXYNOS-M1-NOT: .eabi_attribute 27 1444 ; EXYNOS-M1-NOT: .eabi_attribute 28 1445 ; EXYNOS-M1: .eabi_attribute 36, 1 1446 ; EXYNOS-M1: .eabi_attribute 38, 1 1447 ; EXYNOS-M1: .eabi_attribute 42, 1 1448 ; EXYNOS-M1-NOT: .eabi_attribute 44 1449 ; EXYNOS-M15: .eabi_attribute 68, 3 1450 1451 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 19 1452 ;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign. 1453 ; EXYNOS-M1-FAST: .eabi_attribute 20, 2 1454 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 21 1455 ; EXYNOS-M1-FAST-NOT: .eabi_attribute 22 1456 ; EXYNOS-M1-FAST: .eabi_attribute 23, 1 1457 1458 ; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1459 ; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1460 ; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1461 ; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1462 ; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1463 1464 ; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1465 ; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1466 ; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1467 ; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1468 ; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1469 ; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1470 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1471 ;; We default to IEEE 754 compliance 1472 ; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1473 ; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1474 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1475 ; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1476 ; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1477 ; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1478 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1479 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1480 ; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1481 ; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1482 ; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1483 ; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1484 ; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1485 1486 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1487 ;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1488 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1489 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1490 ; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1491 ; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1492 1493 ; RELOC-PIC: .eabi_attribute 15, 1 1494 ; RELOC-PIC: .eabi_attribute 16, 1 1495 ; RELOC-PIC: .eabi_attribute 17, 2 1496 ; RELOC-OTHER: .eabi_attribute 17, 1 1497 1498 ; PCS-R9-USE: .eabi_attribute 14, 0 1499 ; PCS-R9-RESERVE: .eabi_attribute 14, 3 1500 1501 define i32 @f(i64 %z) { 1502 ret i32 0 1503 } 1504
