1 ; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=V6M --check-prefix=CHECK 2 ; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=V7M --check-prefix=CHECK 3 ; RUN: llc < %s -mtriple=thumbv7a-none-eabi | FileCheck %s --check-prefix=V7A --check-prefix=CHECK 4 ; RUN: llc < %s -mtriple=armv7a-none-eabi | FileCheck %s --check-prefix=V7A --check-prefix=CHECK 5 6 7 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 8 target triple = "armv7a-arm-none-eabi" 9 10 define void @test_const(i32 %val) { 11 ; CHECK-LABEL: test_const: 12 entry: 13 %cmp = icmp eq i32 %val, 0 14 br i1 %cmp, label %write_reg, label %exit 15 16 write_reg: 17 tail call void @llvm.write_register.i32(metadata !0, i32 0) 18 tail call void @llvm.write_register.i32(metadata !0, i32 0) 19 ; V6M: msr apsr, {{r[0-9]+}} 20 ; V6M: msr apsr, {{r[0-9]+}} 21 ; V7M: msr apsr_nzcvq, {{r[0-9]+}} 22 ; V7M: msr apsr_nzcvq, {{r[0-9]+}} 23 ; V7A: msr APSR_nzcvqg, {{r[0-9]+}} 24 ; V7A: msr APSR_nzcvqg, {{r[0-9]+}} 25 br label %exit 26 27 exit: 28 ret void 29 } 30 31 define void @test_var(i32 %val, i32 %apsr) { 32 ; CHECK-LABEL: test_var: 33 entry: 34 %cmp = icmp eq i32 %val, 0 35 br i1 %cmp, label %write_reg, label %exit 36 37 write_reg: 38 tail call void @llvm.write_register.i32(metadata !0, i32 %apsr) 39 tail call void @llvm.write_register.i32(metadata !0, i32 %apsr) 40 ; V6M: msr apsr, {{r[0-9]+}} 41 ; V6M: msr apsr, {{r[0-9]+}} 42 ; V7M: msr apsr_nzcvq, {{r[0-9]+}} 43 ; V7M: msr apsr_nzcvq, {{r[0-9]+}} 44 ; V7A: msr APSR_nzcvqg, {{r[0-9]+}} 45 ; V7A: msr APSR_nzcvqg, {{r[0-9]+}} 46 br label %exit 47 48 exit: 49 ret void 50 } 51 52 53 declare void @llvm.write_register.i32(metadata, i32) 54 55 !0 = !{!"apsr"} 56
