1 ; RUN: llc < %s | FileCheck %s 2 3 ; Test that basic 64-bit integer comparison operations assemble as expected. 4 5 target datalayout = "E-m:e-p:32:32-i64:64-a:0:32-n32-S64" 6 target triple = "lanai" 7 8 ; CHECK-LABEL: eq_i64: 9 ; CHECK: xor 10 ; CHECK: xor 11 ; CHECK: or.f 12 ; CHECK-NEXT: seq 13 define i32 @eq_i64(i64 inreg %x, i64 inreg %y) { 14 %a = icmp eq i64 %x, %y 15 %b = zext i1 %a to i32 16 ret i32 %b 17 } 18 19 ; CHECK-LABEL: ne_i64: 20 ; CHECK: xor 21 ; CHECK: xor 22 ; CHECK: or.f 23 ; CHECK-NEXT: sne 24 define i32 @ne_i64(i64 inreg %x, i64 inreg %y) { 25 %a = icmp ne i64 %x, %y 26 %b = zext i1 %a to i32 27 ret i32 %b 28 } 29 30 ; CHECK-LABEL: slt_i64: 31 ; CHECK: sub.f %r7, %r19, %r3 32 ; CHECK: subb.f %r6, %r18, %r3 33 ; CHECK-NEXT: slt 34 define i32 @slt_i64(i64 inreg %x, i64 inreg %y) { 35 %a = icmp slt i64 %x, %y 36 %b = zext i1 %a to i32 37 ret i32 %b 38 } 39 40 ; CHECK-LABEL: sle_i64: 41 ; CHECK: sub.f %r19, %r7, %r3 42 ; CHECK: subb.f %r18, %r6, %r3 43 ; CHECK-NEXT: sge %rv 44 define i32 @sle_i64(i64 inreg %x, i64 inreg %y) { 45 %a = icmp sle i64 %x, %y 46 %b = zext i1 %a to i32 47 ret i32 %b 48 } 49 50 ; CHECK-LABEL: ult_i64: 51 ; CHECK: sub.f %r7, %r19, %r3 52 ; CHECK: subb.f %r6, %r18, %r3 53 ; CHECK-NEXT: sult %rv 54 define i32 @ult_i64(i64 inreg %x, i64 inreg %y) { 55 %a = icmp ult i64 %x, %y 56 %b = zext i1 %a to i32 57 ret i32 %b 58 } 59 60 ; CHECK-LABEL: ule_i64: 61 ; CHECK: sub.f %r19, %r7, %r3 62 ; CHECK: subb.f %r18, %r6, %r3 63 ; CHECK-NEXT: suge %rv 64 define i32 @ule_i64(i64 inreg %x, i64 inreg %y) { 65 %a = icmp ule i64 %x, %y 66 %b = zext i1 %a to i32 67 ret i32 %b 68 } 69 70 ; CHECK-LABEL: sgt_i64: 71 ; CHECK: sub.f %r19, %r7, %r3 72 ; CHECK: subb.f %r18, %r6, %r3 73 ; CHECK-NEXT: slt %rv 74 define i32 @sgt_i64(i64 inreg %x, i64 inreg %y) { 75 %a = icmp sgt i64 %x, %y 76 %b = zext i1 %a to i32 77 ret i32 %b 78 } 79 80 ; CHECK-LABEL: sge_i64: 81 ; CHECK: sub.f %r7, %r19, %r3 82 ; CHECK: subb.f %r6, %r18, %r3 83 ; CHECK-NEXT: sge %rv 84 define i32 @sge_i64(i64 inreg %x, i64 inreg %y) { 85 %a = icmp sge i64 %x, %y 86 %b = zext i1 %a to i32 87 ret i32 %b 88 } 89 90 ; CHECK-LABEL: ugt_i64: 91 ; CHECK: sub.f %r19, %r7, %r3 92 ; CHECK: subb.f %r18, %r6, %r3 93 ; CHECK-NEXT: sult %rv 94 define i32 @ugt_i64(i64 inreg %x, i64 inreg %y) { 95 %a = icmp ugt i64 %x, %y 96 %b = zext i1 %a to i32 97 ret i32 %b 98 } 99 100 ; CHECK-LABEL: uge_i64: 101 ; CHECK: sub.f %r7, %r19, %r3 102 ; CHECK: subb.f %r6, %r18, %r3 103 ; CHECK-NEXT: suge %rv 104 define i32 @uge_i64(i64 inreg %x, i64 inreg %y) { 105 %a = icmp uge i64 %x, %y 106 %b = zext i1 %a to i32 107 ret i32 %b 108 } 109
