1 ; RUN: llc %s -march=mips -mcpu=mips32r3 -mattr=micromips -filetype=asm \ 2 ; RUN: -relocation-model=pic -O3 -o - | FileCheck %s 3 ; RUN: llc %s -march=mips64 -mcpu=mips64r6 -mattr=micromips -filetype=asm \ 4 ; RUN: -relocation-model=pic -O3 -o - | FileCheck %s 5 6 ; The purpose of this test is to check whether the CodeGen selects 7 ; LW16 instruction with the base register in a range of $2-$7, $16, $17. 8 9 %struct.T = type { i32 } 10 11 $_ZN1TaSERKS_ = comdat any 12 13 define linkonce_odr void @_ZN1TaSERKS_(%struct.T* %this, %struct.T* dereferenceable(4) %t) #0 comdat align 2 { 14 entry: 15 %this.addr = alloca %struct.T*, align 4 16 %t.addr = alloca %struct.T*, align 4 17 %this1 = load %struct.T*, %struct.T** %this.addr, align 4 18 %0 = load %struct.T*, %struct.T** %t.addr, align 4 19 %V3 = getelementptr inbounds %struct.T, %struct.T* %0, i32 0, i32 0 20 %1 = load i32, i32* %V3, align 4 21 %V4 = getelementptr inbounds %struct.T, %struct.T* %this1, i32 0, i32 0 22 store i32 %1, i32* %V4, align 4 23 ret void 24 } 25 26 ; CHECK: lw16 ${{[0-9]+}}, 0(${{[2-7]|16|17}}) 27
