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      1 ; Test the handling of named short vector arguments.
      2 ;
      3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-VEC
      4 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK
      5 
      6 ; This routine has 12 vector arguments, which fill up %v24-%v31
      7 ; and the four single-wide stack slots starting at 160.
      8 declare void @bar(<1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>,
      9                   <1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>,
     10                   <1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>)
     11 
     12 define void @foo() {
     13 ; CHECK-VEC-LABEL: foo:
     14 ; CHECK-VEC-DAG: vrepib %v24, 1
     15 ; CHECK-VEC-DAG: vrepib %v26, 2
     16 ; CHECK-VEC-DAG: vrepib %v28, 3
     17 ; CHECK-VEC-DAG: vrepib %v30, 4
     18 ; CHECK-VEC-DAG: vrepib %v25, 5
     19 ; CHECK-VEC-DAG: vrepib %v27, 6
     20 ; CHECK-VEC-DAG: vrepib %v29, 7
     21 ; CHECK-VEC-DAG: vrepib %v31, 8
     22 ; CHECK-VEC: brasl %r14, bar@PLT
     23 ;
     24 
     25 ; CHECK-STACK: .LCPI0_0:
     26 ; CHECK-STACK:	.quad	795741901033570304      # 0xb0b0b0b00000000
     27 ; CHECK-STACK:	.quad	868082074056920076      # 0xc0c0c0c0c0c0c0c
     28 ; CHECK-STACK: .LCPI0_1:
     29 ; CHECK-STACK:	.quad	648518346341351424      # 0x900000000000000
     30 ; CHECK-STACK:	.quad	723390690146385920      # 0xa0a000000000000
     31 
     32 ; CHECK-STACK-LABEL: foo:
     33 ; CHECK-STACK: aghi %r15, -192
     34 
     35 ; CHECK-STACK-DAG: larl [[REG1:%r[0-9]+]], .LCPI0_0
     36 ; CHECK-STACK-DAG: vl [[VREG0:%v[0-9]+]], 0([[REG1]])
     37 ; CHECK-STACK-DAG: vst [[VREG0]], 176(%r15)
     38 
     39 ; CHECK-STACK-DAG: larl [[REG2:%r[0-9]+]], .LCPI0_1
     40 ; CHECK-STACK-DAG: vl [[VREG1:%v[0-9]+]], 0([[REG2]])
     41 ; CHECK-STACK-DAG: vst [[VREG1]], 160(%r15)
     42 
     43 ; CHECK-STACK: brasl %r14, bar@PLT
     44 
     45   call void @bar (<1 x i8> <i8 1>,
     46                   <2 x i8> <i8 2, i8 2>,
     47                   <4 x i8> <i8 3, i8 3, i8 3, i8 3>,
     48                   <8 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>,
     49                   <1 x i8> <i8 5>,
     50                   <2 x i8> <i8 6, i8 6>,
     51                   <4 x i8> <i8 7, i8 7, i8 7, i8 7>,
     52                   <8 x i8> <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>,
     53                   <1 x i8> <i8 9>,
     54                   <2 x i8> <i8 10, i8 10>,
     55                   <4 x i8> <i8 11, i8 11, i8 11, i8 11>,
     56                   <8 x i8> <i8 12, i8 12, i8 12, i8 12, i8 12, i8 12, i8 12, i8 12>)
     57   ret void
     58 }
     59