1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s 2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s 3 4 5 define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) { 6 ; CHECK-LABEL: test_rsqrt14_ss: 7 ; CHECK: ## BB#0: 8 ; CHECK-NEXT: vrsqrt14ss %xmm0, %xmm0, %xmm0 9 ; CHECK-NEXT: retq 10 %res = call <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; 11 ret <4 x float> %res 12 } 13 declare <4 x float> @llvm.x86.avx512.rsqrt14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone 14 15 define <4 x float> @test_rcp14_ss(<4 x float> %a0) { 16 ; CHECK-LABEL: test_rcp14_ss: 17 ; CHECK: ## BB#0: 18 ; CHECK-NEXT: vrcp14ss %xmm0, %xmm0, %xmm0 19 ; CHECK-NEXT: retq 20 %res = call <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float> %a0, <4 x float> %a0, <4 x float> zeroinitializer, i8 -1) ; 21 ret <4 x float> %res 22 } 23 declare <4 x float> @llvm.x86.avx512.rcp14.ss(<4 x float>, <4 x float>, <4 x float>, i8) nounwind readnone 24 25 define <2 x double> @test_rsqrt14_sd(<2 x double> %a0) { 26 ; CHECK-LABEL: test_rsqrt14_sd: 27 ; CHECK: ## BB#0: 28 ; CHECK-NEXT: vrsqrt14sd %xmm0, %xmm0, %xmm0 29 ; CHECK-NEXT: retq 30 %res = call <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ; 31 ret <2 x double> %res 32 } 33 declare <2 x double> @llvm.x86.avx512.rsqrt14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone 34 35 define <2 x double> @test_rcp14_sd(<2 x double> %a0) { 36 ; CHECK-LABEL: test_rcp14_sd: 37 ; CHECK: ## BB#0: 38 ; CHECK-NEXT: vrcp14sd %xmm0, %xmm0, %xmm0 39 ; CHECK-NEXT: retq 40 %res = call <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double> %a0, <2 x double> %a0, <2 x double> zeroinitializer, i8 -1) ; 41 ret <2 x double> %res 42 43 } 44 declare <2 x double> @llvm.x86.avx512.rcp14.sd(<2 x double>, <2 x double>, <2 x double>, i8) nounwind readnone 45 46 declare <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float>, <4 x float>,<4 x float>, i8, i32) 47 define <4 x float>@test_int_x86_avx512_mask_scalef_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4) { 48 ; CHECK-LABEL: test_int_x86_avx512_mask_scalef_ss: 49 ; CHECK: vscalefss %xmm1, %xmm0, %xmm2 {%k1} 50 ; CHECK: vscalefss {rn-sae}, %xmm1, %xmm0, %xmm0 51 %res = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 %x4, i32 4) 52 %res1 = call <4 x float> @llvm.x86.avx512.mask.scalef.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x3, i8 -1, i32 8) 53 %res2 = fadd <4 x float> %res, %res1 54 ret <4 x float> %res2 55 } 56 57 declare <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double>, <2 x double>,<2 x double>, i8, i32) 58 define <2 x double>@test_int_x86_avx512_mask_scalef_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4) { 59 ; CHECK-LABEL: test_int_x86_avx512_mask_scalef_sd: 60 ; CHECK: vscalefsd %xmm1, %xmm0, %xmm2 {%k1} 61 ; CHECK: vscalefsd {rn-sae}, %xmm1, %xmm0, %xmm0 62 %res = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 %x4, i32 4) 63 %res1 = call <2 x double> @llvm.x86.avx512.mask.scalef.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x3, i8 -1, i32 8) 64 %res2 = fadd <2 x double> %res, %res1 65 ret <2 x double> %res2 66 } 67
