1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2 ; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s 3 4 ; These tests just check that the plumbing is in place for @llvm.bitreverse. The 5 ; actual output is massive at the moment as llvm.bitreverse is not yet legal. 6 7 declare <2 x i16> @llvm.bitreverse.v2i16(<2 x i16>) readnone 8 9 define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) nounwind { 10 ; CHECK-LABEL: test_bitreverse_v2i16: 11 ; CHECK: # BB#0: 12 ; CHECK-NEXT: pushl %edi 13 ; CHECK-NEXT: pushl %esi 14 ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx 15 ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 16 ; CHECK-NEXT: movl %eax, %ecx 17 ; CHECK-NEXT: shll $15, %ecx 18 ; CHECK-NEXT: movl %eax, %esi 19 ; CHECK-NEXT: andl $2, %esi 20 ; CHECK-NEXT: shll $13, %esi 21 ; CHECK-NEXT: orl %ecx, %esi 22 ; CHECK-NEXT: movl %eax, %ecx 23 ; CHECK-NEXT: andl $4, %ecx 24 ; CHECK-NEXT: shll $11, %ecx 25 ; CHECK-NEXT: orl %esi, %ecx 26 ; CHECK-NEXT: movl %eax, %esi 27 ; CHECK-NEXT: andl $8, %esi 28 ; CHECK-NEXT: shll $9, %esi 29 ; CHECK-NEXT: orl %ecx, %esi 30 ; CHECK-NEXT: movl %eax, %edi 31 ; CHECK-NEXT: andl $16, %edi 32 ; CHECK-NEXT: shll $7, %edi 33 ; CHECK-NEXT: orl %esi, %edi 34 ; CHECK-NEXT: movl %eax, %ecx 35 ; CHECK-NEXT: andl $32, %ecx 36 ; CHECK-NEXT: shll $5, %ecx 37 ; CHECK-NEXT: orl %edi, %ecx 38 ; CHECK-NEXT: movl %eax, %esi 39 ; CHECK-NEXT: andl $64, %esi 40 ; CHECK-NEXT: shll $3, %esi 41 ; CHECK-NEXT: leal (%eax,%eax), %edi 42 ; CHECK-NEXT: andl $256, %edi # imm = 0x100 43 ; CHECK-NEXT: orl %esi, %edi 44 ; CHECK-NEXT: movl %eax, %esi 45 ; CHECK-NEXT: shrl %esi 46 ; CHECK-NEXT: andl $128, %esi 47 ; CHECK-NEXT: orl %edi, %esi 48 ; CHECK-NEXT: movl %eax, %edi 49 ; CHECK-NEXT: shrl $3, %edi 50 ; CHECK-NEXT: andl $64, %edi 51 ; CHECK-NEXT: orl %esi, %edi 52 ; CHECK-NEXT: movl %eax, %esi 53 ; CHECK-NEXT: shrl $5, %esi 54 ; CHECK-NEXT: andl $32, %esi 55 ; CHECK-NEXT: orl %edi, %esi 56 ; CHECK-NEXT: movl %eax, %edi 57 ; CHECK-NEXT: shrl $7, %edi 58 ; CHECK-NEXT: andl $16, %edi 59 ; CHECK-NEXT: orl %esi, %edi 60 ; CHECK-NEXT: movl %eax, %esi 61 ; CHECK-NEXT: shrl $9, %esi 62 ; CHECK-NEXT: andl $8, %esi 63 ; CHECK-NEXT: orl %edi, %esi 64 ; CHECK-NEXT: movl %eax, %edi 65 ; CHECK-NEXT: shrl $11, %edi 66 ; CHECK-NEXT: andl $4, %edi 67 ; CHECK-NEXT: orl %esi, %edi 68 ; CHECK-NEXT: movl %eax, %esi 69 ; CHECK-NEXT: shrl $13, %esi 70 ; CHECK-NEXT: andl $2, %esi 71 ; CHECK-NEXT: orl %edi, %esi 72 ; CHECK-NEXT: shrl $15, %eax 73 ; CHECK-NEXT: orl %esi, %eax 74 ; CHECK-NEXT: orl %ecx, %eax 75 ; CHECK-NEXT: movl %edx, %ecx 76 ; CHECK-NEXT: shll $15, %ecx 77 ; CHECK-NEXT: movl %edx, %esi 78 ; CHECK-NEXT: andl $2, %esi 79 ; CHECK-NEXT: shll $13, %esi 80 ; CHECK-NEXT: orl %ecx, %esi 81 ; CHECK-NEXT: movl %edx, %ecx 82 ; CHECK-NEXT: andl $4, %ecx 83 ; CHECK-NEXT: shll $11, %ecx 84 ; CHECK-NEXT: orl %esi, %ecx 85 ; CHECK-NEXT: movl %edx, %esi 86 ; CHECK-NEXT: andl $8, %esi 87 ; CHECK-NEXT: shll $9, %esi 88 ; CHECK-NEXT: orl %ecx, %esi 89 ; CHECK-NEXT: movl %edx, %edi 90 ; CHECK-NEXT: andl $16, %edi 91 ; CHECK-NEXT: shll $7, %edi 92 ; CHECK-NEXT: orl %esi, %edi 93 ; CHECK-NEXT: movl %edx, %ecx 94 ; CHECK-NEXT: andl $32, %ecx 95 ; CHECK-NEXT: shll $5, %ecx 96 ; CHECK-NEXT: orl %edi, %ecx 97 ; CHECK-NEXT: movl %edx, %esi 98 ; CHECK-NEXT: andl $64, %esi 99 ; CHECK-NEXT: shll $3, %esi 100 ; CHECK-NEXT: leal (%edx,%edx), %edi 101 ; CHECK-NEXT: andl $256, %edi # imm = 0x100 102 ; CHECK-NEXT: orl %esi, %edi 103 ; CHECK-NEXT: movl %edx, %esi 104 ; CHECK-NEXT: shrl %esi 105 ; CHECK-NEXT: andl $128, %esi 106 ; CHECK-NEXT: orl %edi, %esi 107 ; CHECK-NEXT: movl %edx, %edi 108 ; CHECK-NEXT: shrl $3, %edi 109 ; CHECK-NEXT: andl $64, %edi 110 ; CHECK-NEXT: orl %esi, %edi 111 ; CHECK-NEXT: movl %edx, %esi 112 ; CHECK-NEXT: shrl $5, %esi 113 ; CHECK-NEXT: andl $32, %esi 114 ; CHECK-NEXT: orl %edi, %esi 115 ; CHECK-NEXT: movl %edx, %edi 116 ; CHECK-NEXT: shrl $7, %edi 117 ; CHECK-NEXT: andl $16, %edi 118 ; CHECK-NEXT: orl %esi, %edi 119 ; CHECK-NEXT: movl %edx, %esi 120 ; CHECK-NEXT: shrl $9, %esi 121 ; CHECK-NEXT: andl $8, %esi 122 ; CHECK-NEXT: orl %edi, %esi 123 ; CHECK-NEXT: movl %edx, %edi 124 ; CHECK-NEXT: shrl $11, %edi 125 ; CHECK-NEXT: andl $4, %edi 126 ; CHECK-NEXT: orl %esi, %edi 127 ; CHECK-NEXT: movl %edx, %esi 128 ; CHECK-NEXT: shrl $13, %esi 129 ; CHECK-NEXT: andl $2, %esi 130 ; CHECK-NEXT: orl %edi, %esi 131 ; CHECK-NEXT: shrl $15, %edx 132 ; CHECK-NEXT: orl %esi, %edx 133 ; CHECK-NEXT: orl %ecx, %edx 134 ; CHECK-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 135 ; CHECK-NEXT: # kill: %DX<def> %DX<kill> %EDX<kill> 136 ; CHECK-NEXT: popl %esi 137 ; CHECK-NEXT: popl %edi 138 ; CHECK-NEXT: retl 139 %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a) 140 ret <2 x i16> %b 141 } 142 143 declare i24 @llvm.bitreverse.i24(i24) readnone 144 145 define i24 @test_bitreverse_i24(i24 %a) nounwind { 146 ; CHECK-LABEL: test_bitreverse_i24: 147 ; CHECK: # BB#0: 148 ; CHECK-NEXT: pushl %esi 149 ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 150 ; CHECK-NEXT: movl %eax, %ecx 151 ; CHECK-NEXT: shll $31, %ecx 152 ; CHECK-NEXT: movl %eax, %edx 153 ; CHECK-NEXT: andl $2, %edx 154 ; CHECK-NEXT: shll $29, %edx 155 ; CHECK-NEXT: orl %ecx, %edx 156 ; CHECK-NEXT: movl %eax, %ecx 157 ; CHECK-NEXT: andl $4, %ecx 158 ; CHECK-NEXT: shll $27, %ecx 159 ; CHECK-NEXT: orl %edx, %ecx 160 ; CHECK-NEXT: movl %eax, %edx 161 ; CHECK-NEXT: andl $8, %edx 162 ; CHECK-NEXT: shll $25, %edx 163 ; CHECK-NEXT: orl %ecx, %edx 164 ; CHECK-NEXT: movl %eax, %esi 165 ; CHECK-NEXT: andl $16, %esi 166 ; CHECK-NEXT: shll $23, %esi 167 ; CHECK-NEXT: orl %edx, %esi 168 ; CHECK-NEXT: movl %eax, %ecx 169 ; CHECK-NEXT: andl $32, %ecx 170 ; CHECK-NEXT: shll $21, %ecx 171 ; CHECK-NEXT: orl %esi, %ecx 172 ; CHECK-NEXT: movl %eax, %edx 173 ; CHECK-NEXT: andl $64, %edx 174 ; CHECK-NEXT: shll $19, %edx 175 ; CHECK-NEXT: movl %eax, %esi 176 ; CHECK-NEXT: shll $17, %esi 177 ; CHECK-NEXT: andl $16777216, %esi # imm = 0x1000000 178 ; CHECK-NEXT: orl %edx, %esi 179 ; CHECK-NEXT: movl %eax, %edx 180 ; CHECK-NEXT: shll $15, %edx 181 ; CHECK-NEXT: andl $8388608, %edx # imm = 0x800000 182 ; CHECK-NEXT: orl %esi, %edx 183 ; CHECK-NEXT: movl %eax, %esi 184 ; CHECK-NEXT: shll $13, %esi 185 ; CHECK-NEXT: andl $4194304, %esi # imm = 0x400000 186 ; CHECK-NEXT: orl %edx, %esi 187 ; CHECK-NEXT: movl %eax, %edx 188 ; CHECK-NEXT: shll $11, %edx 189 ; CHECK-NEXT: andl $2097152, %edx # imm = 0x200000 190 ; CHECK-NEXT: orl %esi, %edx 191 ; CHECK-NEXT: movl %eax, %esi 192 ; CHECK-NEXT: shll $9, %esi 193 ; CHECK-NEXT: andl $1048576, %esi # imm = 0x100000 194 ; CHECK-NEXT: orl %edx, %esi 195 ; CHECK-NEXT: movl %eax, %edx 196 ; CHECK-NEXT: shll $7, %edx 197 ; CHECK-NEXT: andl $524288, %edx # imm = 0x80000 198 ; CHECK-NEXT: orl %esi, %edx 199 ; CHECK-NEXT: movl %eax, %esi 200 ; CHECK-NEXT: shll $5, %esi 201 ; CHECK-NEXT: andl $262144, %esi # imm = 0x40000 202 ; CHECK-NEXT: orl %edx, %esi 203 ; CHECK-NEXT: leal (,%eax,8), %edx 204 ; CHECK-NEXT: andl $131072, %edx # imm = 0x20000 205 ; CHECK-NEXT: orl %esi, %edx 206 ; CHECK-NEXT: leal (%eax,%eax), %esi 207 ; CHECK-NEXT: andl $65536, %esi # imm = 0x10000 208 ; CHECK-NEXT: orl %edx, %esi 209 ; CHECK-NEXT: movl %eax, %edx 210 ; CHECK-NEXT: shrl %edx 211 ; CHECK-NEXT: andl $32768, %edx # imm = 0x8000 212 ; CHECK-NEXT: orl %esi, %edx 213 ; CHECK-NEXT: movl %eax, %esi 214 ; CHECK-NEXT: shrl $3, %esi 215 ; CHECK-NEXT: andl $16384, %esi # imm = 0x4000 216 ; CHECK-NEXT: orl %edx, %esi 217 ; CHECK-NEXT: movl %eax, %edx 218 ; CHECK-NEXT: shrl $5, %edx 219 ; CHECK-NEXT: andl $8192, %edx # imm = 0x2000 220 ; CHECK-NEXT: orl %esi, %edx 221 ; CHECK-NEXT: movl %eax, %esi 222 ; CHECK-NEXT: shrl $7, %esi 223 ; CHECK-NEXT: andl $4096, %esi # imm = 0x1000 224 ; CHECK-NEXT: orl %edx, %esi 225 ; CHECK-NEXT: movl %eax, %edx 226 ; CHECK-NEXT: shrl $9, %edx 227 ; CHECK-NEXT: andl $2048, %edx # imm = 0x800 228 ; CHECK-NEXT: orl %esi, %edx 229 ; CHECK-NEXT: movl %eax, %esi 230 ; CHECK-NEXT: shrl $11, %esi 231 ; CHECK-NEXT: andl $1024, %esi # imm = 0x400 232 ; CHECK-NEXT: orl %edx, %esi 233 ; CHECK-NEXT: movl %eax, %edx 234 ; CHECK-NEXT: shrl $13, %edx 235 ; CHECK-NEXT: andl $512, %edx # imm = 0x200 236 ; CHECK-NEXT: orl %esi, %edx 237 ; CHECK-NEXT: shrl $15, %eax 238 ; CHECK-NEXT: andl $256, %eax # imm = 0x100 239 ; CHECK-NEXT: orl %edx, %eax 240 ; CHECK-NEXT: orl %ecx, %eax 241 ; CHECK-NEXT: shrl $8, %eax 242 ; CHECK-NEXT: popl %esi 243 ; CHECK-NEXT: retl 244 %b = call i24 @llvm.bitreverse.i24(i24 %a) 245 ret i24 %b 246 } 247 248 declare i8 @llvm.bitreverse.i8(i8) readnone 249 250 define i8 @test_bitreverse_i8(i8 %a) { 251 ; CHECK-LABEL: test_bitreverse_i8: 252 ; CHECK: # BB#0: 253 ; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 254 ; CHECK-NEXT: movl %eax, %ecx 255 ; CHECK-NEXT: shlb $7, %cl 256 ; CHECK-NEXT: movl %eax, %edx 257 ; CHECK-NEXT: shlb $5, %dl 258 ; CHECK-NEXT: andb $64, %dl 259 ; CHECK-NEXT: movb %al, %ah 260 ; CHECK-NEXT: shlb $3, %ah 261 ; CHECK-NEXT: andb $32, %ah 262 ; CHECK-NEXT: orb %dl, %ah 263 ; CHECK-NEXT: movl %eax, %edx 264 ; CHECK-NEXT: addb %dl, %dl 265 ; CHECK-NEXT: andb $16, %dl 266 ; CHECK-NEXT: orb %ah, %dl 267 ; CHECK-NEXT: movb %al, %ah 268 ; CHECK-NEXT: shrb %ah 269 ; CHECK-NEXT: andb $8, %ah 270 ; CHECK-NEXT: orb %dl, %ah 271 ; CHECK-NEXT: movl %eax, %edx 272 ; CHECK-NEXT: shrb $3, %dl 273 ; CHECK-NEXT: andb $4, %dl 274 ; CHECK-NEXT: orb %ah, %dl 275 ; CHECK-NEXT: movb %al, %ah 276 ; CHECK-NEXT: shrb $5, %ah 277 ; CHECK-NEXT: andb $2, %ah 278 ; CHECK-NEXT: orb %dl, %ah 279 ; CHECK-NEXT: shrb $7, %al 280 ; CHECK-NEXT: orb %ah, %al 281 ; CHECK-NEXT: orb %cl, %al 282 ; CHECK-NEXT: retl 283 %b = call i8 @llvm.bitreverse.i8(i8 %a) 284 ret i8 %b 285 } 286 287 declare i4 @llvm.bitreverse.i4(i4) readnone 288 289 define i4 @test_bitreverse_i4(i4 %a) { 290 ; CHECK-LABEL: test_bitreverse_i4: 291 ; CHECK: # BB#0: 292 ; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 293 ; CHECK-NEXT: movl %eax, %ecx 294 ; CHECK-NEXT: shlb $7, %cl 295 ; CHECK-NEXT: movl %eax, %edx 296 ; CHECK-NEXT: shlb $5, %dl 297 ; CHECK-NEXT: andb $64, %dl 298 ; CHECK-NEXT: movb %al, %ah 299 ; CHECK-NEXT: shlb $3, %ah 300 ; CHECK-NEXT: andb $32, %ah 301 ; CHECK-NEXT: orb %dl, %ah 302 ; CHECK-NEXT: addb %al, %al 303 ; CHECK-NEXT: andb $16, %al 304 ; CHECK-NEXT: orb %ah, %al 305 ; CHECK-NEXT: orb %cl, %al 306 ; CHECK-NEXT: shrb $4, %al 307 ; CHECK-NEXT: retl 308 %b = call i4 @llvm.bitreverse.i4(i4 %a) 309 ret i4 %b 310 } 311 312 ; These tests check that bitreverse(constant) calls are folded 313 314 define <2 x i16> @fold_v2i16() { 315 ; CHECK-LABEL: fold_v2i16: 316 ; CHECK: # BB#0: 317 ; CHECK-NEXT: movw $-4096, %ax # imm = 0xF000 318 ; CHECK-NEXT: movw $240, %dx 319 ; CHECK-NEXT: retl 320 %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>) 321 ret <2 x i16> %b 322 } 323 324 define i24 @fold_i24() { 325 ; CHECK-LABEL: fold_i24: 326 ; CHECK: # BB#0: 327 ; CHECK-NEXT: movl $2048, %eax # imm = 0x800 328 ; CHECK-NEXT: retl 329 %b = call i24 @llvm.bitreverse.i24(i24 4096) 330 ret i24 %b 331 } 332 333 define i8 @fold_i8() { 334 ; CHECK-LABEL: fold_i8: 335 ; CHECK: # BB#0: 336 ; CHECK-NEXT: movb $-16, %al 337 ; CHECK-NEXT: retl 338 %b = call i8 @llvm.bitreverse.i8(i8 15) 339 ret i8 %b 340 } 341 342 define i4 @fold_i4() { 343 ; CHECK-LABEL: fold_i4: 344 ; CHECK: # BB#0: 345 ; CHECK-NEXT: movb $1, %al 346 ; CHECK-NEXT: retl 347 %b = call i4 @llvm.bitreverse.i4(i4 8) 348 ret i4 %b 349 } 350 351 ; These tests check that bitreverse(bitreverse()) calls are removed 352 353 define i8 @identity_i8(i8 %a) { 354 ; CHECK-LABEL: identity_i8: 355 ; CHECK: # BB#0: 356 ; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al 357 ; CHECK-NEXT: retl 358 %b = call i8 @llvm.bitreverse.i8(i8 %a) 359 %c = call i8 @llvm.bitreverse.i8(i8 %b) 360 ret i8 %c 361 } 362 363 define <2 x i16> @identity_v2i16(<2 x i16> %a) { 364 ; CHECK-LABEL: identity_v2i16: 365 ; CHECK: # BB#0: 366 ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 367 ; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx 368 ; CHECK-NEXT: retl 369 %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a) 370 %c = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %b) 371 ret <2 x i16> %c 372 } 373 374 ; These tests check that bitreverse(undef) calls are removed 375 376 define i8 @undef_i8() { 377 ; CHECK-LABEL: undef_i8: 378 ; CHECK: # BB#0: 379 ; CHECK-NEXT: retl 380 %b = call i8 @llvm.bitreverse.i8(i8 undef) 381 ret i8 %b 382 } 383 384 define <2 x i16> @undef_v2i16() { 385 ; CHECK-LABEL: undef_v2i16: 386 ; CHECK: # BB#0: 387 ; CHECK-NEXT: retl 388 %b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> undef) 389 ret <2 x i16> %b 390 } 391