1 ; RUN: llc -verify-regalloc -verify-machineinstrs < %s 2 ; PR27275: When enabling remat for vreg defined by PHIs, make sure the update 3 ; of the live range removes dead phi. Otherwise, we may end up with PHIs with 4 ; incorrect operands and that will trigger assertions or verifier failures 5 ; in later passes. 6 7 target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" 8 target triple = "i386-unknown-linux-gnu" 9 10 @b = external global i64, align 8 11 @d = external global i32, align 4 12 @e = external global i64, align 8 13 @h = external global i16, align 2 14 @a = external global i8, align 1 15 @g = external global i64, align 8 16 @j = external global i32, align 4 17 @f = external global i16, align 2 18 @.str = external unnamed_addr constant [12 x i8], align 1 19 20 define void @fn1() { 21 entry: 22 %tmp = load i64, i64* @b, align 8 23 %or = or i64 0, 3299921317 24 %and = and i64 %or, %tmp 25 %tmp1 = load i32, i32* @d, align 4 26 br i1 undef, label %lor.rhs, label %lor.end 27 28 lor.rhs: ; preds = %entry 29 %tobool3 = icmp ne i8 undef, 0 30 br label %lor.end 31 32 lor.end: ; preds = %lor.rhs, %entry 33 %lor.ext = zext i1 undef to i32 34 %tmp2 = load i64, i64* @e, align 8 35 br i1 undef, label %lor.rhs5, label %lor.end7 36 37 lor.rhs5: ; preds = %lor.end 38 br label %lor.end7 39 40 lor.end7: ; preds = %lor.rhs5, %lor.end 41 %tmp3 = phi i1 [ true, %lor.end ], [ false, %lor.rhs5 ] 42 %neg13 = xor i64 %tmp, -1 43 %conv25 = zext i1 %tmp3 to i32 44 %tobool46 = icmp eq i64 %tmp, 0 45 %.pre = load i16, i16* @h, align 2 46 %tobool10 = icmp eq i16 %.pre, 0 47 %neg.us = xor i32 %tmp1, -1 48 %conv12.us = sext i32 %neg.us to i64 49 %tobool23.us = icmp eq i64 %tmp2, %and 50 %conv39.us = sext i32 %tmp1 to i64 51 br label %LABEL_mSmSDb 52 53 LABEL_mSmSDb.loopexit: ; preds = %lor.end32.us 54 %conv42.us.lcssa = phi i32 [ %conv42.us, %lor.end32.us ] 55 store i64 undef, i64* @g, align 8 56 br label %LABEL_mSmSDb 57 58 LABEL_mSmSDb: ; preds = %LABEL_mSmSDb.loopexit, %lor.end7 59 %tmp4 = phi i32 [ undef, %lor.end7 ], [ %conv42.us.lcssa, %LABEL_mSmSDb.loopexit ] 60 %tmp5 = phi i64 [ %tmp, %lor.end7 ], [ 0, %LABEL_mSmSDb.loopexit ] 61 br i1 %tobool10, label %LABEL_BRBRN.preheader, label %if.then 62 63 if.then: ; preds = %LABEL_mSmSDb 64 store i8 undef, i8* @a, align 1 65 br label %LABEL_BRBRN.preheader 66 67 LABEL_BRBRN.preheader: ; preds = %if.then, %LABEL_mSmSDb 68 %.pre63 = load i64, i64* @g, align 8 69 br i1 %tobool46, label %LABEL_BRBRN.us, label %LABEL_BRBRN.outer 70 71 LABEL_BRBRN.outer: ; preds = %if.then47, %LABEL_BRBRN.preheader 72 %.ph = phi i32 [ 0, %if.then47 ], [ %tmp4, %LABEL_BRBRN.preheader ] 73 %.ph64 = phi i32 [ %conv50, %if.then47 ], [ %tmp1, %LABEL_BRBRN.preheader ] 74 %.ph65 = phi i64 [ %tmp16, %if.then47 ], [ %.pre63, %LABEL_BRBRN.preheader ] 75 %.ph66 = phi i64 [ 0, %if.then47 ], [ %tmp2, %LABEL_BRBRN.preheader ] 76 %.ph67 = phi i64 [ %.pre56.pre, %if.then47 ], [ %tmp5, %LABEL_BRBRN.preheader ] 77 %neg = xor i32 %.ph64, -1 78 %conv12 = sext i32 %neg to i64 79 %tobool23 = icmp eq i64 %.ph66, %and 80 %tmp6 = load i32, i32* @j, align 4 81 %shr = lshr i32 %conv25, %tmp6 82 %conv39 = sext i32 %.ph64 to i64 83 br label %LABEL_BRBRN 84 85 LABEL_BRBRN.us: ; preds = %lor.end32.us, %LABEL_BRBRN.preheader 86 %tmp7 = phi i32 [ %conv42.us, %lor.end32.us ], [ %tmp4, %LABEL_BRBRN.preheader ] 87 %tmp8 = phi i64 [ undef, %lor.end32.us ], [ %.pre63, %LABEL_BRBRN.preheader ] 88 %tmp9 = phi i64 [ %tmp10, %lor.end32.us ], [ %tmp5, %LABEL_BRBRN.preheader ] 89 %mul.us = mul i64 %tmp8, %neg13 90 %mul14.us = mul i64 %mul.us, %conv12.us 91 %cmp.us = icmp sgt i64 %tmp2, %mul14.us 92 %conv16.us = zext i1 %cmp.us to i64 93 %xor.us = xor i64 %conv16.us, %tmp9 94 %rem18.us = urem i32 %lor.ext, %tmp7 95 %conv19.us = zext i32 %rem18.us to i64 96 br i1 %tobool23.us, label %lor.rhs24.us, label %lor.end32.us 97 98 lor.rhs24.us: ; preds = %LABEL_BRBRN.us 99 br label %lor.end32.us 100 101 lor.end32.us: ; preds = %lor.rhs24.us, %LABEL_BRBRN.us 102 %tmp10 = phi i64 [ -2, %LABEL_BRBRN.us ], [ -1, %lor.rhs24.us ] 103 %xor.us.not = xor i64 %xor.us, -1 104 %neg36.us = and i64 %conv19.us, %xor.us.not 105 %conv37.us = zext i32 %tmp7 to i64 106 %sub38.us = sub nsw i64 %neg36.us, %conv37.us 107 %mul40.us = mul nsw i64 %sub38.us, %conv39.us 108 %neg41.us = xor i64 %mul40.us, 4294967295 109 %conv42.us = trunc i64 %neg41.us to i32 110 %tobool43.us = icmp eq i8 undef, 0 111 br i1 %tobool43.us, label %LABEL_mSmSDb.loopexit, label %LABEL_BRBRN.us 112 113 LABEL_BRBRN: ; preds = %lor.end32, %LABEL_BRBRN.outer 114 %tmp11 = phi i32 [ %conv42, %lor.end32 ], [ %.ph, %LABEL_BRBRN.outer ] 115 %tmp12 = phi i64 [ %neg21, %lor.end32 ], [ %.ph65, %LABEL_BRBRN.outer ] 116 %tmp13 = phi i64 [ %conv35, %lor.end32 ], [ %.ph67, %LABEL_BRBRN.outer ] 117 %mul = mul i64 %tmp12, %neg13 118 %mul14 = mul i64 %mul, %conv12 119 %cmp = icmp sgt i64 %.ph66, %mul14 120 %conv16 = zext i1 %cmp to i64 121 %xor = xor i64 %conv16, %tmp13 122 %rem18 = urem i32 %lor.ext, %tmp11 123 %conv19 = zext i32 %rem18 to i64 124 %neg21 = or i64 %xor, undef 125 br i1 %tobool23, label %lor.rhs24, label %lor.end32 126 127 lor.rhs24: ; preds = %LABEL_BRBRN 128 %tmp14 = load volatile i16, i16* @f, align 2 129 %conv26 = sext i16 %tmp14 to i32 130 %and27 = and i32 %conv26, %shr 131 %conv28 = sext i32 %and27 to i64 132 %mul29 = mul nsw i64 %conv28, %tmp 133 %and30 = and i64 %mul29, %tmp13 134 %tobool31 = icmp ne i64 %and30, 0 135 br label %lor.end32 136 137 lor.end32: ; preds = %lor.rhs24, %LABEL_BRBRN 138 %tmp15 = phi i1 [ true, %LABEL_BRBRN ], [ %tobool31, %lor.rhs24 ] 139 %lor.ext33 = zext i1 %tmp15 to i32 140 %neg34 = xor i32 %lor.ext33, -1 141 %conv35 = sext i32 %neg34 to i64 142 %xor.not = xor i64 %xor, -1 143 %neg36 = and i64 %conv19, %xor.not 144 %conv37 = zext i32 %tmp11 to i64 145 %sub38 = sub nsw i64 %neg36, %conv37 146 %mul40 = mul nsw i64 %sub38, %conv39 147 %neg41 = xor i64 %mul40, 4294967295 148 %conv42 = trunc i64 %neg41 to i32 149 %tobool43 = icmp eq i8 undef, 0 150 br i1 %tobool43, label %if.then47, label %LABEL_BRBRN 151 152 if.then47: ; preds = %lor.end32 153 tail call void (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), i64 %conv39) 154 %tmp16 = load i64, i64* @g, align 8 155 %neg49 = xor i64 %tmp16, 4294967295 156 %conv50 = trunc i64 %neg49 to i32 157 %.pre56.pre = load i64, i64* @b, align 8 158 br label %LABEL_BRBRN.outer 159 } 160 161 declare void @printf(i8* nocapture readonly, ...) 162
