1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse,+soft-float \ 2 ; RUN: | FileCheck %s --check-prefix=SOFT1 --check-prefix=CHECK 3 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2,+soft-float \ 4 ; RUN: | FileCheck %s --check-prefix=SOFT2 --check-prefix=CHECK 5 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse \ 6 ; RUN: | FileCheck %s --check-prefix=SSE1 --check-prefix=CHECK 7 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 \ 8 ; RUN: | FileCheck %s --check-prefix=SSE2 --check-prefix=CHECK 9 ; RUN: llc < %s -mtriple=x86_64-gnux32 -mattr=+mmx,+sse2,+soft-float | FileCheck %s 10 11 ; CHECK-NOT: xmm{{[0-9]+}} 12 13 %struct.__va_list_tag = type { i32, i32, i8*, i8* } 14 15 define i32 @t1(i32 %a, ...) nounwind { 16 entry: 17 %va = alloca [1 x %struct.__va_list_tag], align 8 ; <[1 x %struct.__va_list_tag]*> [#uses=2] 18 %va12 = bitcast [1 x %struct.__va_list_tag]* %va to i8* ; <i8*> [#uses=2] 19 call void @llvm.va_start(i8* %va12) 20 %va3 = getelementptr [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %va, i64 0, i64 0 ; <%struct.__va_list_tag*> [#uses=1] 21 call void @bar(%struct.__va_list_tag* %va3) nounwind 22 call void @llvm.va_end(i8* %va12) 23 ret i32 undef 24 ; CHECK-LABEL: t1: 25 ; CHECK: ret{{[lq]}} 26 } 27 28 declare void @llvm.va_start(i8*) nounwind 29 30 declare void @bar(%struct.__va_list_tag*) 31 32 declare void @llvm.va_end(i8*) nounwind 33 34 define float @t2(float %a, float %b) nounwind readnone { 35 entry: 36 %0 = fadd float %a, %b ; <float> [#uses=1] 37 ret float %0 38 ; CHECK-LABEL: t2: 39 ; SOFT1-NOT: xmm{{[0-9]+}} 40 ; SOFT2-NOT: xmm{{[0-9]+}} 41 ; SSE1: xmm{{[0-9]+}} 42 ; SSE2: xmm{{[0-9]+}} 43 ; CHECK: ret{{[lq]}} 44 } 45 46 ; soft-float means no SSE instruction and passing fp128 as pair of i64. 47 define fp128 @t3(fp128 %a, fp128 %b) nounwind readnone { 48 entry: 49 %0 = fadd fp128 %b, %a 50 ret fp128 %0 51 ; CHECK-LABEL: t3: 52 ; SOFT1-NOT: xmm{{[0-9]+}} 53 ; SOFT2-NOT: xmm{{[0-9]+}} 54 ; SSE1: xmm{{[0-9]+}} 55 ; SSE2: xmm{{[0-9]+}} 56 ; CHECK: ret{{[lq]}} 57 } 58
