1 ; rdar://7860110 2 ; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64 3 ; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON 4 ; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 6 target triple = "x86_64-apple-darwin10.2" 7 8 define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp { 9 entry: 10 %A = load i32, i32* %a0, align 4 11 %B = and i32 %A, -256 ; 0xFFFFFF00 12 %C = zext i8 %a1 to i32 13 %D = or i32 %C, %B 14 store i32 %D, i32* %a0, align 4 15 ret void 16 17 ; X64-LABEL: test1: 18 ; X64: movb %sil, (%rdi) 19 20 ; X32-LABEL: test1: 21 ; X32: movb 8(%esp), %al 22 ; X32: movb %al, (%{{.*}}) 23 } 24 25 define void @test2(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp { 26 entry: 27 %A = load i32, i32* %a0, align 4 28 %B = and i32 %A, -65281 ; 0xFFFF00FF 29 %C = zext i8 %a1 to i32 30 %CS = shl i32 %C, 8 31 %D = or i32 %B, %CS 32 store i32 %D, i32* %a0, align 4 33 ret void 34 ; X64-LABEL: test2: 35 ; X64: movb %sil, 1(%rdi) 36 37 ; X32-LABEL: test2: 38 ; X32: movb 8(%esp), %[[REG:[abcd]]]l 39 ; X32: movb %[[REG]]l, 1(%{{.*}}) 40 } 41 42 define void @test3(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp { 43 entry: 44 %A = load i32, i32* %a0, align 4 45 %B = and i32 %A, -65536 ; 0xFFFF0000 46 %C = zext i16 %a1 to i32 47 %D = or i32 %B, %C 48 store i32 %D, i32* %a0, align 4 49 ret void 50 ; X64-LABEL: test3: 51 ; X64: movw %si, (%rdi) 52 53 ; X32-LABEL: test3: 54 ; X32-BWON: movzwl 8(%esp), %eax 55 ; X32-BWOFF: movw 8(%esp), %ax 56 ; X32: movw %ax, (%{{.*}}) 57 } 58 59 define void @test4(i32* nocapture %a0, i16 zeroext %a1) nounwind ssp { 60 entry: 61 %A = load i32, i32* %a0, align 4 62 %B = and i32 %A, 65535 ; 0x0000FFFF 63 %C = zext i16 %a1 to i32 64 %CS = shl i32 %C, 16 65 %D = or i32 %B, %CS 66 store i32 %D, i32* %a0, align 4 67 ret void 68 ; X64-LABEL: test4: 69 ; X64: movw %si, 2(%rdi) 70 71 ; X32-LABEL: test4: 72 ; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x 73 ; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x 74 ; X32: movw %[[REG]]x, 2(%{{.*}}) 75 } 76 77 define void @test5(i64* nocapture %a0, i16 zeroext %a1) nounwind ssp { 78 entry: 79 %A = load i64, i64* %a0, align 4 80 %B = and i64 %A, -4294901761 ; 0xFFFFFFFF0000FFFF 81 %C = zext i16 %a1 to i64 82 %CS = shl i64 %C, 16 83 %D = or i64 %B, %CS 84 store i64 %D, i64* %a0, align 4 85 ret void 86 ; X64-LABEL: test5: 87 ; X64: movw %si, 2(%rdi) 88 89 ; X32-LABEL: test5: 90 ; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x 91 ; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x 92 ; X32: movw %[[REG]]x, 2(%{{.*}}) 93 } 94 95 define void @test6(i64* nocapture %a0, i8 zeroext %a1) nounwind ssp { 96 entry: 97 %A = load i64, i64* %a0, align 4 98 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 99 %C = zext i8 %a1 to i64 100 %CS = shl i64 %C, 40 101 %D = or i64 %B, %CS 102 store i64 %D, i64* %a0, align 4 103 ret void 104 ; X64-LABEL: test6: 105 ; X64: movb %sil, 5(%rdi) 106 107 108 ; X32-LABEL: test6: 109 ; X32: movb 8(%esp), %[[REG:[abcd]l]] 110 ; X32: movb %[[REG]], 5(%{{.*}}) 111 } 112 113 define i32 @test7(i64* nocapture %a0, i8 zeroext %a1, i32* %P2) nounwind { 114 entry: 115 %OtherLoad = load i32 , i32 *%P2 116 %A = load i64, i64* %a0, align 4 117 %B = and i64 %A, -280375465082881 ; 0xFFFF00FFFFFFFFFF 118 %C = zext i8 %a1 to i64 119 %CS = shl i64 %C, 40 120 %D = or i64 %B, %CS 121 store i64 %D, i64* %a0, align 4 122 ret i32 %OtherLoad 123 ; X64-LABEL: test7: 124 ; X64: movb %sil, 5(%rdi) 125 126 127 ; X32-LABEL: test7: 128 ; X32: movb 8(%esp), %[[REG:[abcd]l]] 129 ; X32: movb %[[REG]], 5(%{{.*}}) 130 } 131 132 ; PR7833 133 134 @g_16 = internal global i32 -1 135 136 ; X64-LABEL: test8: 137 ; X64-NEXT: movl _g_16(%rip), %eax 138 ; X64-NEXT: movl $0, _g_16(%rip) 139 ; X64-NEXT: orl $1, %eax 140 ; X64-NEXT: movl %eax, _g_16(%rip) 141 ; X64-NEXT: ret 142 define void @test8() nounwind { 143 %tmp = load i32, i32* @g_16 144 store i32 0, i32* @g_16 145 %or = or i32 %tmp, 1 146 store i32 %or, i32* @g_16 147 ret void 148 } 149 150 ; X64-LABEL: test9: 151 ; X64-NEXT: orb $1, _g_16(%rip) 152 ; X64-NEXT: ret 153 define void @test9() nounwind { 154 %tmp = load i32, i32* @g_16 155 %or = or i32 %tmp, 1 156 store i32 %or, i32* @g_16 157 ret void 158 } 159 160 ; rdar://8494845 + PR8244 161 ; X64-LABEL: test10: 162 ; X64-NEXT: movsbl (%rdi), %eax 163 ; X64-NEXT: shrl $8, %eax 164 ; X64-NEXT: ret 165 define i8 @test10(i8* %P) nounwind ssp { 166 entry: 167 %tmp = load i8, i8* %P, align 1 168 %conv = sext i8 %tmp to i32 169 %shr3 = lshr i32 %conv, 8 170 %conv2 = trunc i32 %shr3 to i8 171 ret i8 %conv2 172 } 173
