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      1 ; RUN: llc < %s -march=x86-64 -mcpu=bdver1 | FileCheck %s
      2 
      3 ; clang -Oz -c test1.cpp -emit-llvm -S -o
      4 ; Verify that we generate shld insruction when we are optimizing for size,
      5 ; even for X86_64 processors that are known to have poor latency double 
      6 ; precision shift instructions.
      7 ; uint64_t lshift10(uint64_t a, uint64_t b)
      8 ; {
      9 ;     return (a << 10) | (b >> 54);
     10 ; }
     11 
     12 ; Function Attrs: minsize nounwind readnone uwtable
     13 define i64 @_Z8lshift10mm(i64 %a, i64 %b) #0 {
     14 entry:
     15 ; CHECK:   shldq   $10
     16   %shl = shl i64 %a, 10
     17   %shr = lshr i64 %b, 54
     18   %or = or i64 %shr, %shl
     19   ret i64 %or
     20 }
     21 
     22 attributes #0 = { minsize nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
     23 
     24 
     25 ; clang -Os -c test2.cpp -emit-llvm -S
     26 ; Verify that we generate shld insruction when we are optimizing for size,
     27 ; even for X86_64 processors that are known to have poor latency double
     28 ; precision shift instructions.
     29 ; uint64_t lshift11(uint64_t a, uint64_t b)
     30 ; {
     31 ;     return (a << 11) | (b >> 53);
     32 ; }
     33 
     34 ; Function Attrs: nounwind optsize readnone uwtable
     35 define i64 @_Z8lshift11mm(i64 %a, i64 %b) #1 {
     36 entry:
     37 ; CHECK:   shldq   $11
     38   %shl = shl i64 %a, 11
     39   %shr = lshr i64 %b, 53
     40   %or = or i64 %shr, %shl
     41   ret i64 %or
     42 }
     43 
     44 attributes #1 = { nounwind optsize readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
     45 
     46 ; clang -O2 -c test2.cpp -emit-llvm -S
     47 ; Verify that we do not generate shld insruction when we are not optimizing
     48 ; for size for X86_64 processors that are known to have poor latency double
     49 ; precision shift instructions.
     50 ; uint64_t lshift12(uint64_t a, uint64_t b)
     51 ; {
     52 ;     return (a << 12) | (b >> 52);
     53 ; }
     54 
     55 ; Function Attrs: nounwind optsize readnone uwtable
     56 define i64 @_Z8lshift12mm(i64 %a, i64 %b) #2 {
     57 entry:
     58 ; CHECK:       shlq    $12
     59 ; CHECK-NEXT:  shrq    $52
     60   %shl = shl i64 %a, 12
     61   %shr = lshr i64 %b, 52
     62   %or = or i64 %shr, %shl
     63   ret i64 %or
     64 }
     65 
     66 attributes #2= { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
     67 
     68