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      1 // RUN: not llvm-mc -triple arm-eabi -mattr=+v5te %s -o /dev/null 2>&1 | FileCheck %s
      2 //
      3 // rdar://14479793
      4 
      5 ldrd r1, r2, [pc, #0]
      6 ldrd r1, r2, [r3, #4]
      7 ldrd r1, r2, [r3], #4
      8 ldrd r1, r2, [r3, #4]!
      9 ldrd r1, r2, [r3, -r4]!
     10 ldrd r1, r2, [r3, r4]
     11 ldrd r1, r2, [r3], r4
     12 // CHECK: error: Rt must be even-numbered
     13 // CHECK: error: Rt must be even-numbered
     14 // CHECK: error: Rt must be even-numbered
     15 // CHECK: error: Rt must be even-numbered
     16 // CHECK: error: Rt must be even-numbered
     17 // CHECK: error: Rt must be even-numbered
     18 // CHECK: error: Rt must be even-numbered
     19 
     20 ldrd r0, r3, [pc, #0]
     21 ldrd r0, r3, [r4, #4]
     22 ldrd r0, r3, [r4], #4
     23 ldrd r0, r3, [r4, #4]!
     24 ldrd r0, r3, [r4, -r5]!
     25 ldrd r0, r3, [r4, r5]
     26 ldrd r0, r3, [r4], r5
     27 // CHECK: error: destination operands must be sequential
     28 // CHECK: error: destination operands must be sequential
     29 // CHECK: error: destination operands must be sequential
     30 // CHECK: error: destination operands must be sequential
     31 // CHECK: error: destination operands must be sequential
     32 // CHECK: error: destination operands must be sequential
     33 // CHECK: error: destination operands must be sequential
     34 
     35 ldrd lr, pc, [pc, #0]
     36 ldrd lr, pc, [r3, #4]
     37 ldrd lr, pc, [r3], #4
     38 ldrd lr, pc, [r3, #4]!
     39 ldrd lr, pc, [r3, -r4]!
     40 ldrd lr, pc, [r3, r4]
     41 ldrd lr, pc, [r3], r4
     42 // CHECK: error: Rt can't be R14
     43 // CHECK: error: Rt can't be R14
     44 // CHECK: error: Rt can't be R14
     45 // CHECK: error: Rt can't be R14
     46 // CHECK: error: Rt can't be R14
     47 // CHECK: error: Rt can't be R14
     48 // CHECK: error: Rt can't be R14
     49 
     50 ldrd r0, r1, [r0], #4
     51 ldrd r0, r1, [r1], #4
     52 ldrd r0, r1, [r0, #4]!
     53 ldrd r0, r1, [r1, #4]!
     54 // CHECK: error: base register needs to be different from destination registers
     55 // CHECK: error: base register needs to be different from destination registers
     56 // CHECK: error: base register needs to be different from destination registers
     57 // CHECK: error: base register needs to be different from destination registers
     58