1 ; RUN: opt -S < %s -loop-vectorize -force-vector-interleave=2 -force-vector-width=4 | FileCheck %s 2 ; RUN: opt -S < %s -loop-vectorize -force-vector-interleave=1 -force-vector-width=2 | FileCheck %s --check-prefix=FORCE-VEC 3 4 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 5 target triple = "aarch64--linux-gnueabi" 6 7 ; Test integer induction variable of step 2: 8 ; for (int i = 0; i < 1024; i+=2) { 9 ; int tmp = *A++; 10 ; sum += i * tmp; 11 ; } 12 13 ; CHECK-LABEL: @ind_plus2( 14 ; CHECK: load <4 x i32>, <4 x i32>* 15 ; CHECK: load <4 x i32>, <4 x i32>* 16 ; CHECK: mul nsw <4 x i32> 17 ; CHECK: mul nsw <4 x i32> 18 ; CHECK: add nsw <4 x i32> 19 ; CHECK: add nsw <4 x i32> 20 ; CHECK: %index.next = add i64 %index, 8 21 ; CHECK: icmp eq i64 %index.next, 512 22 23 ; FORCE-VEC-LABEL: @ind_plus2( 24 ; FORCE-VEC: %wide.load = load <2 x i32>, <2 x i32>* 25 ; FORCE-VEC: mul nsw <2 x i32> 26 ; FORCE-VEC: add nsw <2 x i32> 27 ; FORCE-VEC: %index.next = add i64 %index, 2 28 ; FORCE-VEC: icmp eq i64 %index.next, 512 29 define i32 @ind_plus2(i32* %A) { 30 entry: 31 br label %for.body 32 33 for.body: ; preds = %entry, %for.body 34 %A.addr = phi i32* [ %A, %entry ], [ %inc.ptr, %for.body ] 35 %i = phi i32 [ 0, %entry ], [ %add1, %for.body ] 36 %sum = phi i32 [ 0, %entry ], [ %add, %for.body ] 37 %inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1 38 %0 = load i32, i32* %A.addr, align 4 39 %mul = mul nsw i32 %0, %i 40 %add = add nsw i32 %mul, %sum 41 %add1 = add nsw i32 %i, 2 42 %cmp = icmp slt i32 %add1, 1024 43 br i1 %cmp, label %for.body, label %for.end 44 45 for.end: ; preds = %for.body 46 %add.lcssa = phi i32 [ %add, %for.body ] 47 ret i32 %add.lcssa 48 } 49 50 51 ; Test integer induction variable of step -2: 52 ; for (int i = 1024; i > 0; i-=2) { 53 ; int tmp = *A++; 54 ; sum += i * tmp; 55 ; } 56 57 ; CHECK-LABEL: @ind_minus2( 58 ; CHECK: load <4 x i32>, <4 x i32>* 59 ; CHECK: load <4 x i32>, <4 x i32>* 60 ; CHECK: mul nsw <4 x i32> 61 ; CHECK: mul nsw <4 x i32> 62 ; CHECK: add nsw <4 x i32> 63 ; CHECK: add nsw <4 x i32> 64 ; CHECK: %index.next = add i64 %index, 8 65 ; CHECK: icmp eq i64 %index.next, 512 66 67 ; FORCE-VEC-LABEL: @ind_minus2( 68 ; FORCE-VEC: %wide.load = load <2 x i32>, <2 x i32>* 69 ; FORCE-VEC: mul nsw <2 x i32> 70 ; FORCE-VEC: add nsw <2 x i32> 71 ; FORCE-VEC: %index.next = add i64 %index, 2 72 ; FORCE-VEC: icmp eq i64 %index.next, 512 73 define i32 @ind_minus2(i32* %A) { 74 entry: 75 br label %for.body 76 77 for.body: ; preds = %entry, %for.body 78 %A.addr = phi i32* [ %A, %entry ], [ %inc.ptr, %for.body ] 79 %i = phi i32 [ 1024, %entry ], [ %sub, %for.body ] 80 %sum = phi i32 [ 0, %entry ], [ %add, %for.body ] 81 %inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1 82 %0 = load i32, i32* %A.addr, align 4 83 %mul = mul nsw i32 %0, %i 84 %add = add nsw i32 %mul, %sum 85 %sub = add nsw i32 %i, -2 86 %cmp = icmp sgt i32 %i, 2 87 br i1 %cmp, label %for.body, label %for.end 88 89 for.end: ; preds = %for.body 90 %add.lcssa = phi i32 [ %add, %for.body ] 91 ret i32 %add.lcssa 92 } 93 94 95 ; Test pointer induction variable of step 2. As currently we don't support 96 ; masked load/store, vectorization is possible but not beneficial. If loop 97 ; vectorization is not enforced, LV will only do interleave. 98 ; for (int i = 0; i < 1024; i++) { 99 ; int tmp0 = *A++; 100 ; int tmp1 = *A++; 101 ; sum += tmp0 * tmp1; 102 ; } 103 104 ; CHECK-LABEL: @ptr_ind_plus2( 105 ; CHECK: %[[V0:.*]] = load <8 x i32> 106 ; CHECK: shufflevector <8 x i32> %[[V0]], <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 107 ; CHECK: shufflevector <8 x i32> %[[V0]], <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 108 ; CHECK: %[[V1:.*]] = load <8 x i32> 109 ; CHECK: shufflevector <8 x i32> %[[V1]], <8 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 110 ; CHECK: shufflevector <8 x i32> %[[V1]], <8 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 111 ; CHECK: mul nsw <4 x i32> 112 ; CHECK: mul nsw <4 x i32> 113 ; CHECK: add nsw <4 x i32> 114 ; CHECK: add nsw <4 x i32> 115 ; CHECK: %index.next = add i64 %index, 8 116 ; CHECK: icmp eq i64 %index.next, 1024 117 118 ; FORCE-VEC-LABEL: @ptr_ind_plus2( 119 ; FORCE-VEC: %[[V:.*]] = load <4 x i32> 120 ; FORCE-VEC: shufflevector <4 x i32> %[[V]], <4 x i32> undef, <2 x i32> <i32 0, i32 2> 121 ; FORCE-VEC: shufflevector <4 x i32> %[[V]], <4 x i32> undef, <2 x i32> <i32 1, i32 3> 122 ; FORCE-VEC: mul nsw <2 x i32> 123 ; FORCE-VEC: add nsw <2 x i32> 124 ; FORCE-VEC: %index.next = add i64 %index, 2 125 ; FORCE-VEC: icmp eq i64 %index.next, 1024 126 define i32 @ptr_ind_plus2(i32* %A) { 127 entry: 128 br label %for.body 129 130 for.body: ; preds = %for.body, %entry 131 %A.addr = phi i32* [ %A, %entry ], [ %inc.ptr1, %for.body ] 132 %sum = phi i32 [ 0, %entry ], [ %add, %for.body ] 133 %i = phi i32 [ 0, %entry ], [ %inc, %for.body ] 134 %inc.ptr = getelementptr inbounds i32, i32* %A.addr, i64 1 135 %0 = load i32, i32* %A.addr, align 4 136 %inc.ptr1 = getelementptr inbounds i32, i32* %A.addr, i64 2 137 %1 = load i32, i32* %inc.ptr, align 4 138 %mul = mul nsw i32 %1, %0 139 %add = add nsw i32 %mul, %sum 140 %inc = add nsw i32 %i, 1 141 %exitcond = icmp eq i32 %inc, 1024 142 br i1 %exitcond, label %for.end, label %for.body 143 144 for.end: ; preds = %for.body 145 %add.lcssa = phi i32 [ %add, %for.body ] 146 ret i32 %add.lcssa 147 } 148