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      1 /*
      2  * Copyright (C) 2016 Rob Clark <robclark (at) freedesktop.org>
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     21  * SOFTWARE.
     22  *
     23  * Authors:
     24  *    Rob Clark <robclark (at) freedesktop.org>
     25  */
     26 
     27 
     28 #include "pipe/p_state.h"
     29 #include "util/u_string.h"
     30 #include "util/u_memory.h"
     31 
     32 #include "fd5_zsa.h"
     33 #include "fd5_context.h"
     34 #include "fd5_format.h"
     35 
     36 void *
     37 fd5_zsa_state_create(struct pipe_context *pctx,
     38 		const struct pipe_depth_stencil_alpha_state *cso)
     39 {
     40 	struct fd5_zsa_stateobj *so;
     41 
     42 	so = CALLOC_STRUCT(fd5_zsa_stateobj);
     43 	if (!so)
     44 		return NULL;
     45 
     46 	so->base = *cso;
     47 
     48 	so->rb_depth_cntl |=
     49 		A5XX_RB_DEPTH_CNTL_ZFUNC(cso->depth.func); /* maps 1:1 */
     50 
     51 	if (cso->depth.enabled)
     52 		so->rb_depth_cntl |=
     53 			A5XX_RB_DEPTH_CNTL_Z_ENABLE |
     54 			A5XX_RB_DEPTH_CNTL_Z_TEST_ENABLE;
     55 
     56 	if (cso->depth.writemask)
     57 		so->rb_depth_cntl |= A5XX_RB_DEPTH_CNTL_Z_WRITE_ENABLE;
     58 
     59 	if (cso->stencil[0].enabled) {
     60 		const struct pipe_stencil_state *s = &cso->stencil[0];
     61 
     62 		so->rb_stencil_control |=
     63 			A5XX_RB_STENCIL_CONTROL_STENCIL_READ |
     64 			A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
     65 			A5XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */
     66 			A5XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) |
     67 			A5XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) |
     68 			A5XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op));
     69 		so->rb_stencilrefmask |=
     70 			A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) |
     71 			A5XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask);
     72 
     73 		if (cso->stencil[1].enabled) {
     74 			const struct pipe_stencil_state *bs = &cso->stencil[1];
     75 
     76 			so->rb_stencil_control |=
     77 				A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF |
     78 				A5XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
     79 				A5XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
     80 				A5XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
     81 				A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
     82 //			so->rb_stencilrefmask_bf |=
     83 //				A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
     84 //				A5XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
     85 		}
     86 	}
     87 
     88 	if (cso->alpha.enabled) {
     89 		uint32_t ref = cso->alpha.ref_value * 255.0;
     90 		so->rb_alpha_control =
     91 			A5XX_RB_ALPHA_CONTROL_ALPHA_TEST |
     92 			A5XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
     93 			A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha.func);
     94 //		so->rb_depth_control |=
     95 //			A5XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
     96 	}
     97 
     98 	return so;
     99 }
    100