1 /* 2 * Mesa 3-D graphics library 3 * 4 * Copyright (C) 2012-2013 LunarG, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Chia-I Wu <olv (at) lunarg.com> 26 */ 27 28 #include "genhw/genhw.h" 29 #include "core/ilo_state_surface.h" 30 #include "core/ilo_state_vf.h" 31 #include "ilo_format.h" 32 33 bool 34 ilo_format_support_vb(const struct ilo_dev *dev, 35 enum pipe_format format) 36 { 37 const int idx = ilo_format_translate(dev, format, PIPE_BIND_VERTEX_BUFFER); 38 39 return (idx >= 0 && ilo_state_vf_valid_element_format(dev, idx)); 40 } 41 42 bool 43 ilo_format_support_sol(const struct ilo_dev *dev, 44 enum pipe_format format) 45 { 46 const int idx = ilo_format_translate(dev, format, PIPE_BIND_STREAM_OUTPUT); 47 48 return (idx >= 0 && ilo_state_surface_valid_format(dev, 49 ILO_STATE_SURFACE_ACCESS_DP_SVB, idx)); 50 } 51 52 bool 53 ilo_format_support_sampler(const struct ilo_dev *dev, 54 enum pipe_format format) 55 { 56 const int idx = ilo_format_translate(dev, format, PIPE_BIND_SAMPLER_VIEW); 57 58 return (idx >= 0 && ilo_state_surface_valid_format(dev, 59 ILO_STATE_SURFACE_ACCESS_SAMPLER, idx)); 60 } 61 62 bool 63 ilo_format_support_rt(const struct ilo_dev *dev, 64 enum pipe_format format) 65 { 66 const int idx = ilo_format_translate(dev, format, PIPE_BIND_RENDER_TARGET); 67 68 return (idx >= 0 && ilo_state_surface_valid_format(dev, 69 ILO_STATE_SURFACE_ACCESS_DP_RENDER, idx)); 70 } 71 72 bool 73 ilo_format_support_zs(const struct ilo_dev *dev, 74 enum pipe_format format) 75 { 76 switch (format) { 77 case PIPE_FORMAT_Z16_UNORM: 78 case PIPE_FORMAT_Z24X8_UNORM: 79 case PIPE_FORMAT_Z32_FLOAT: 80 case PIPE_FORMAT_Z24_UNORM_S8_UINT: 81 case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT: 82 return true; 83 case PIPE_FORMAT_S8_UINT: 84 /* TODO separate stencil */ 85 default: 86 return false; 87 } 88 } 89 90 /** 91 * Translate a color (non-depth/stencil) pipe format to the matching hardware 92 * format. Return -1 on errors. 93 */ 94 int 95 ilo_format_translate_color(const struct ilo_dev *dev, 96 enum pipe_format format) 97 { 98 static const int format_mapping[PIPE_FORMAT_COUNT] = { 99 [PIPE_FORMAT_NONE] = 0, 100 [PIPE_FORMAT_B8G8R8A8_UNORM] = GEN6_FORMAT_B8G8R8A8_UNORM, 101 [PIPE_FORMAT_B8G8R8X8_UNORM] = GEN6_FORMAT_B8G8R8X8_UNORM, 102 [PIPE_FORMAT_A8R8G8B8_UNORM] = 0, 103 [PIPE_FORMAT_X8R8G8B8_UNORM] = 0, 104 [PIPE_FORMAT_B5G5R5A1_UNORM] = GEN6_FORMAT_B5G5R5A1_UNORM, 105 [PIPE_FORMAT_B4G4R4A4_UNORM] = GEN6_FORMAT_B4G4R4A4_UNORM, 106 [PIPE_FORMAT_B5G6R5_UNORM] = GEN6_FORMAT_B5G6R5_UNORM, 107 [PIPE_FORMAT_R10G10B10A2_UNORM] = GEN6_FORMAT_R10G10B10A2_UNORM, 108 [PIPE_FORMAT_L8_UNORM] = GEN6_FORMAT_L8_UNORM, 109 [PIPE_FORMAT_A8_UNORM] = GEN6_FORMAT_A8_UNORM, 110 [PIPE_FORMAT_I8_UNORM] = GEN6_FORMAT_I8_UNORM, 111 [PIPE_FORMAT_L8A8_UNORM] = GEN6_FORMAT_L8A8_UNORM, 112 [PIPE_FORMAT_L16_UNORM] = GEN6_FORMAT_L16_UNORM, 113 [PIPE_FORMAT_UYVY] = GEN6_FORMAT_YCRCB_SWAPUVY, 114 [PIPE_FORMAT_YUYV] = GEN6_FORMAT_YCRCB_NORMAL, 115 [PIPE_FORMAT_Z16_UNORM] = 0, 116 [PIPE_FORMAT_Z32_UNORM] = 0, 117 [PIPE_FORMAT_Z32_FLOAT] = 0, 118 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = 0, 119 [PIPE_FORMAT_S8_UINT_Z24_UNORM] = 0, 120 [PIPE_FORMAT_Z24X8_UNORM] = 0, 121 [PIPE_FORMAT_X8Z24_UNORM] = 0, 122 [PIPE_FORMAT_S8_UINT] = 0, 123 [PIPE_FORMAT_R64_FLOAT] = GEN6_FORMAT_R64_FLOAT, 124 [PIPE_FORMAT_R64G64_FLOAT] = GEN6_FORMAT_R64G64_FLOAT, 125 [PIPE_FORMAT_R64G64B64_FLOAT] = GEN6_FORMAT_R64G64B64_FLOAT, 126 [PIPE_FORMAT_R64G64B64A64_FLOAT] = GEN6_FORMAT_R64G64B64A64_FLOAT, 127 [PIPE_FORMAT_R32_FLOAT] = GEN6_FORMAT_R32_FLOAT, 128 [PIPE_FORMAT_R32G32_FLOAT] = GEN6_FORMAT_R32G32_FLOAT, 129 [PIPE_FORMAT_R32G32B32_FLOAT] = GEN6_FORMAT_R32G32B32_FLOAT, 130 [PIPE_FORMAT_R32G32B32A32_FLOAT] = GEN6_FORMAT_R32G32B32A32_FLOAT, 131 [PIPE_FORMAT_R32_UNORM] = GEN6_FORMAT_R32_UNORM, 132 [PIPE_FORMAT_R32G32_UNORM] = GEN6_FORMAT_R32G32_UNORM, 133 [PIPE_FORMAT_R32G32B32_UNORM] = GEN6_FORMAT_R32G32B32_UNORM, 134 [PIPE_FORMAT_R32G32B32A32_UNORM] = GEN6_FORMAT_R32G32B32A32_UNORM, 135 [PIPE_FORMAT_R32_USCALED] = GEN6_FORMAT_R32_USCALED, 136 [PIPE_FORMAT_R32G32_USCALED] = GEN6_FORMAT_R32G32_USCALED, 137 [PIPE_FORMAT_R32G32B32_USCALED] = GEN6_FORMAT_R32G32B32_USCALED, 138 [PIPE_FORMAT_R32G32B32A32_USCALED] = GEN6_FORMAT_R32G32B32A32_USCALED, 139 [PIPE_FORMAT_R32_SNORM] = GEN6_FORMAT_R32_SNORM, 140 [PIPE_FORMAT_R32G32_SNORM] = GEN6_FORMAT_R32G32_SNORM, 141 [PIPE_FORMAT_R32G32B32_SNORM] = GEN6_FORMAT_R32G32B32_SNORM, 142 [PIPE_FORMAT_R32G32B32A32_SNORM] = GEN6_FORMAT_R32G32B32A32_SNORM, 143 [PIPE_FORMAT_R32_SSCALED] = GEN6_FORMAT_R32_SSCALED, 144 [PIPE_FORMAT_R32G32_SSCALED] = GEN6_FORMAT_R32G32_SSCALED, 145 [PIPE_FORMAT_R32G32B32_SSCALED] = GEN6_FORMAT_R32G32B32_SSCALED, 146 [PIPE_FORMAT_R32G32B32A32_SSCALED] = GEN6_FORMAT_R32G32B32A32_SSCALED, 147 [PIPE_FORMAT_R16_UNORM] = GEN6_FORMAT_R16_UNORM, 148 [PIPE_FORMAT_R16G16_UNORM] = GEN6_FORMAT_R16G16_UNORM, 149 [PIPE_FORMAT_R16G16B16_UNORM] = GEN6_FORMAT_R16G16B16_UNORM, 150 [PIPE_FORMAT_R16G16B16A16_UNORM] = GEN6_FORMAT_R16G16B16A16_UNORM, 151 [PIPE_FORMAT_R16_USCALED] = GEN6_FORMAT_R16_USCALED, 152 [PIPE_FORMAT_R16G16_USCALED] = GEN6_FORMAT_R16G16_USCALED, 153 [PIPE_FORMAT_R16G16B16_USCALED] = GEN6_FORMAT_R16G16B16_USCALED, 154 [PIPE_FORMAT_R16G16B16A16_USCALED] = GEN6_FORMAT_R16G16B16A16_USCALED, 155 [PIPE_FORMAT_R16_SNORM] = GEN6_FORMAT_R16_SNORM, 156 [PIPE_FORMAT_R16G16_SNORM] = GEN6_FORMAT_R16G16_SNORM, 157 [PIPE_FORMAT_R16G16B16_SNORM] = GEN6_FORMAT_R16G16B16_SNORM, 158 [PIPE_FORMAT_R16G16B16A16_SNORM] = GEN6_FORMAT_R16G16B16A16_SNORM, 159 [PIPE_FORMAT_R16_SSCALED] = GEN6_FORMAT_R16_SSCALED, 160 [PIPE_FORMAT_R16G16_SSCALED] = GEN6_FORMAT_R16G16_SSCALED, 161 [PIPE_FORMAT_R16G16B16_SSCALED] = GEN6_FORMAT_R16G16B16_SSCALED, 162 [PIPE_FORMAT_R16G16B16A16_SSCALED] = GEN6_FORMAT_R16G16B16A16_SSCALED, 163 [PIPE_FORMAT_R8_UNORM] = GEN6_FORMAT_R8_UNORM, 164 [PIPE_FORMAT_R8G8_UNORM] = GEN6_FORMAT_R8G8_UNORM, 165 [PIPE_FORMAT_R8G8B8_UNORM] = GEN6_FORMAT_R8G8B8_UNORM, 166 [PIPE_FORMAT_R8G8B8A8_UNORM] = GEN6_FORMAT_R8G8B8A8_UNORM, 167 [PIPE_FORMAT_X8B8G8R8_UNORM] = 0, 168 [PIPE_FORMAT_R8_USCALED] = GEN6_FORMAT_R8_USCALED, 169 [PIPE_FORMAT_R8G8_USCALED] = GEN6_FORMAT_R8G8_USCALED, 170 [PIPE_FORMAT_R8G8B8_USCALED] = GEN6_FORMAT_R8G8B8_USCALED, 171 [PIPE_FORMAT_R8G8B8A8_USCALED] = GEN6_FORMAT_R8G8B8A8_USCALED, 172 [PIPE_FORMAT_R8_SNORM] = GEN6_FORMAT_R8_SNORM, 173 [PIPE_FORMAT_R8G8_SNORM] = GEN6_FORMAT_R8G8_SNORM, 174 [PIPE_FORMAT_R8G8B8_SNORM] = GEN6_FORMAT_R8G8B8_SNORM, 175 [PIPE_FORMAT_R8G8B8A8_SNORM] = GEN6_FORMAT_R8G8B8A8_SNORM, 176 [PIPE_FORMAT_R8_SSCALED] = GEN6_FORMAT_R8_SSCALED, 177 [PIPE_FORMAT_R8G8_SSCALED] = GEN6_FORMAT_R8G8_SSCALED, 178 [PIPE_FORMAT_R8G8B8_SSCALED] = GEN6_FORMAT_R8G8B8_SSCALED, 179 [PIPE_FORMAT_R8G8B8A8_SSCALED] = GEN6_FORMAT_R8G8B8A8_SSCALED, 180 [PIPE_FORMAT_R32_FIXED] = GEN6_FORMAT_R32_SFIXED, 181 [PIPE_FORMAT_R32G32_FIXED] = GEN6_FORMAT_R32G32_SFIXED, 182 [PIPE_FORMAT_R32G32B32_FIXED] = GEN6_FORMAT_R32G32B32_SFIXED, 183 [PIPE_FORMAT_R32G32B32A32_FIXED] = GEN6_FORMAT_R32G32B32A32_SFIXED, 184 [PIPE_FORMAT_R16_FLOAT] = GEN6_FORMAT_R16_FLOAT, 185 [PIPE_FORMAT_R16G16_FLOAT] = GEN6_FORMAT_R16G16_FLOAT, 186 [PIPE_FORMAT_R16G16B16_FLOAT] = GEN6_FORMAT_R16G16B16_FLOAT, 187 [PIPE_FORMAT_R16G16B16A16_FLOAT] = GEN6_FORMAT_R16G16B16A16_FLOAT, 188 [PIPE_FORMAT_L8_SRGB] = GEN6_FORMAT_L8_UNORM_SRGB, 189 [PIPE_FORMAT_L8A8_SRGB] = GEN6_FORMAT_L8A8_UNORM_SRGB, 190 [PIPE_FORMAT_R8G8B8_SRGB] = GEN6_FORMAT_R8G8B8_UNORM_SRGB, 191 [PIPE_FORMAT_A8B8G8R8_SRGB] = 0, 192 [PIPE_FORMAT_X8B8G8R8_SRGB] = 0, 193 [PIPE_FORMAT_B8G8R8A8_SRGB] = GEN6_FORMAT_B8G8R8A8_UNORM_SRGB, 194 [PIPE_FORMAT_B8G8R8X8_SRGB] = GEN6_FORMAT_B8G8R8X8_UNORM_SRGB, 195 [PIPE_FORMAT_A8R8G8B8_SRGB] = 0, 196 [PIPE_FORMAT_X8R8G8B8_SRGB] = 0, 197 [PIPE_FORMAT_R8G8B8A8_SRGB] = GEN6_FORMAT_R8G8B8A8_UNORM_SRGB, 198 [PIPE_FORMAT_DXT1_RGB] = GEN6_FORMAT_DXT1_RGB, 199 [PIPE_FORMAT_DXT1_RGBA] = GEN6_FORMAT_BC1_UNORM, 200 [PIPE_FORMAT_DXT3_RGBA] = GEN6_FORMAT_BC2_UNORM, 201 [PIPE_FORMAT_DXT5_RGBA] = GEN6_FORMAT_BC3_UNORM, 202 [PIPE_FORMAT_DXT1_SRGB] = GEN6_FORMAT_DXT1_RGB_SRGB, 203 [PIPE_FORMAT_DXT1_SRGBA] = GEN6_FORMAT_BC1_UNORM_SRGB, 204 [PIPE_FORMAT_DXT3_SRGBA] = GEN6_FORMAT_BC2_UNORM_SRGB, 205 [PIPE_FORMAT_DXT5_SRGBA] = GEN6_FORMAT_BC3_UNORM_SRGB, 206 [PIPE_FORMAT_RGTC1_UNORM] = GEN6_FORMAT_BC4_UNORM, 207 [PIPE_FORMAT_RGTC1_SNORM] = GEN6_FORMAT_BC4_SNORM, 208 [PIPE_FORMAT_RGTC2_UNORM] = GEN6_FORMAT_BC5_UNORM, 209 [PIPE_FORMAT_RGTC2_SNORM] = GEN6_FORMAT_BC5_SNORM, 210 [PIPE_FORMAT_R8G8_B8G8_UNORM] = 0, 211 [PIPE_FORMAT_G8R8_G8B8_UNORM] = 0, 212 [PIPE_FORMAT_R8SG8SB8UX8U_NORM] = 0, 213 [PIPE_FORMAT_R5SG5SB6U_NORM] = 0, 214 [PIPE_FORMAT_A8B8G8R8_UNORM] = 0, 215 [PIPE_FORMAT_B5G5R5X1_UNORM] = GEN6_FORMAT_B5G5R5X1_UNORM, 216 [PIPE_FORMAT_R10G10B10A2_USCALED] = GEN6_FORMAT_R10G10B10A2_USCALED, 217 [PIPE_FORMAT_R11G11B10_FLOAT] = GEN6_FORMAT_R11G11B10_FLOAT, 218 [PIPE_FORMAT_R9G9B9E5_FLOAT] = GEN6_FORMAT_R9G9B9E5_SHAREDEXP, 219 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = 0, 220 [PIPE_FORMAT_R1_UNORM] = GEN6_FORMAT_R1_UNORM, 221 [PIPE_FORMAT_R10G10B10X2_USCALED] = GEN6_FORMAT_R10G10B10X2_USCALED, 222 [PIPE_FORMAT_R10G10B10X2_SNORM] = 0, 223 [PIPE_FORMAT_L4A4_UNORM] = 0, 224 [PIPE_FORMAT_B10G10R10A2_UNORM] = GEN6_FORMAT_B10G10R10A2_UNORM, 225 [PIPE_FORMAT_R10SG10SB10SA2U_NORM] = 0, 226 [PIPE_FORMAT_R8G8Bx_SNORM] = 0, 227 [PIPE_FORMAT_R8G8B8X8_UNORM] = GEN6_FORMAT_R8G8B8X8_UNORM, 228 [PIPE_FORMAT_B4G4R4X4_UNORM] = 0, 229 [PIPE_FORMAT_X24S8_UINT] = 0, 230 [PIPE_FORMAT_S8X24_UINT] = 0, 231 [PIPE_FORMAT_X32_S8X24_UINT] = 0, 232 [PIPE_FORMAT_B2G3R3_UNORM] = 0, 233 [PIPE_FORMAT_L16A16_UNORM] = GEN6_FORMAT_L16A16_UNORM, 234 [PIPE_FORMAT_A16_UNORM] = GEN6_FORMAT_A16_UNORM, 235 [PIPE_FORMAT_I16_UNORM] = GEN6_FORMAT_I16_UNORM, 236 [PIPE_FORMAT_LATC1_UNORM] = 0, 237 [PIPE_FORMAT_LATC1_SNORM] = 0, 238 [PIPE_FORMAT_LATC2_UNORM] = 0, 239 [PIPE_FORMAT_LATC2_SNORM] = 0, 240 [PIPE_FORMAT_A8_SNORM] = 0, 241 [PIPE_FORMAT_L8_SNORM] = 0, 242 [PIPE_FORMAT_L8A8_SNORM] = 0, 243 [PIPE_FORMAT_I8_SNORM] = 0, 244 [PIPE_FORMAT_A16_SNORM] = 0, 245 [PIPE_FORMAT_L16_SNORM] = 0, 246 [PIPE_FORMAT_L16A16_SNORM] = 0, 247 [PIPE_FORMAT_I16_SNORM] = 0, 248 [PIPE_FORMAT_A16_FLOAT] = GEN6_FORMAT_A16_FLOAT, 249 [PIPE_FORMAT_L16_FLOAT] = GEN6_FORMAT_L16_FLOAT, 250 [PIPE_FORMAT_L16A16_FLOAT] = GEN6_FORMAT_L16A16_FLOAT, 251 [PIPE_FORMAT_I16_FLOAT] = GEN6_FORMAT_I16_FLOAT, 252 [PIPE_FORMAT_A32_FLOAT] = GEN6_FORMAT_A32_FLOAT, 253 [PIPE_FORMAT_L32_FLOAT] = GEN6_FORMAT_L32_FLOAT, 254 [PIPE_FORMAT_L32A32_FLOAT] = GEN6_FORMAT_L32A32_FLOAT, 255 [PIPE_FORMAT_I32_FLOAT] = GEN6_FORMAT_I32_FLOAT, 256 [PIPE_FORMAT_YV12] = 0, 257 [PIPE_FORMAT_YV16] = 0, 258 [PIPE_FORMAT_IYUV] = 0, 259 [PIPE_FORMAT_NV12] = 0, 260 [PIPE_FORMAT_NV21] = 0, 261 [PIPE_FORMAT_A4R4_UNORM] = 0, 262 [PIPE_FORMAT_R4A4_UNORM] = 0, 263 [PIPE_FORMAT_R8A8_UNORM] = 0, 264 [PIPE_FORMAT_A8R8_UNORM] = 0, 265 [PIPE_FORMAT_R10G10B10A2_SSCALED] = GEN6_FORMAT_R10G10B10A2_SSCALED, 266 [PIPE_FORMAT_R10G10B10A2_SNORM] = GEN6_FORMAT_R10G10B10A2_SNORM, 267 [PIPE_FORMAT_B10G10R10A2_USCALED] = GEN6_FORMAT_B10G10R10A2_USCALED, 268 [PIPE_FORMAT_B10G10R10A2_SSCALED] = GEN6_FORMAT_B10G10R10A2_SSCALED, 269 [PIPE_FORMAT_B10G10R10A2_SNORM] = GEN6_FORMAT_B10G10R10A2_SNORM, 270 [PIPE_FORMAT_R8_UINT] = GEN6_FORMAT_R8_UINT, 271 [PIPE_FORMAT_R8G8_UINT] = GEN6_FORMAT_R8G8_UINT, 272 [PIPE_FORMAT_R8G8B8_UINT] = GEN6_FORMAT_R8G8B8_UINT, 273 [PIPE_FORMAT_R8G8B8A8_UINT] = GEN6_FORMAT_R8G8B8A8_UINT, 274 [PIPE_FORMAT_R8_SINT] = GEN6_FORMAT_R8_SINT, 275 [PIPE_FORMAT_R8G8_SINT] = GEN6_FORMAT_R8G8_SINT, 276 [PIPE_FORMAT_R8G8B8_SINT] = GEN6_FORMAT_R8G8B8_SINT, 277 [PIPE_FORMAT_R8G8B8A8_SINT] = GEN6_FORMAT_R8G8B8A8_SINT, 278 [PIPE_FORMAT_R16_UINT] = GEN6_FORMAT_R16_UINT, 279 [PIPE_FORMAT_R16G16_UINT] = GEN6_FORMAT_R16G16_UINT, 280 [PIPE_FORMAT_R16G16B16_UINT] = GEN6_FORMAT_R16G16B16_UINT, 281 [PIPE_FORMAT_R16G16B16A16_UINT] = GEN6_FORMAT_R16G16B16A16_UINT, 282 [PIPE_FORMAT_R16_SINT] = GEN6_FORMAT_R16_SINT, 283 [PIPE_FORMAT_R16G16_SINT] = GEN6_FORMAT_R16G16_SINT, 284 [PIPE_FORMAT_R16G16B16_SINT] = GEN6_FORMAT_R16G16B16_SINT, 285 [PIPE_FORMAT_R16G16B16A16_SINT] = GEN6_FORMAT_R16G16B16A16_SINT, 286 [PIPE_FORMAT_R32_UINT] = GEN6_FORMAT_R32_UINT, 287 [PIPE_FORMAT_R32G32_UINT] = GEN6_FORMAT_R32G32_UINT, 288 [PIPE_FORMAT_R32G32B32_UINT] = GEN6_FORMAT_R32G32B32_UINT, 289 [PIPE_FORMAT_R32G32B32A32_UINT] = GEN6_FORMAT_R32G32B32A32_UINT, 290 [PIPE_FORMAT_R32_SINT] = GEN6_FORMAT_R32_SINT, 291 [PIPE_FORMAT_R32G32_SINT] = GEN6_FORMAT_R32G32_SINT, 292 [PIPE_FORMAT_R32G32B32_SINT] = GEN6_FORMAT_R32G32B32_SINT, 293 [PIPE_FORMAT_R32G32B32A32_SINT] = GEN6_FORMAT_R32G32B32A32_SINT, 294 [PIPE_FORMAT_A8_UINT] = 0, 295 [PIPE_FORMAT_I8_UINT] = GEN6_FORMAT_I8_UINT, 296 [PIPE_FORMAT_L8_UINT] = GEN6_FORMAT_L8_UINT, 297 [PIPE_FORMAT_L8A8_UINT] = GEN6_FORMAT_L8A8_UINT, 298 [PIPE_FORMAT_A8_SINT] = 0, 299 [PIPE_FORMAT_I8_SINT] = GEN6_FORMAT_I8_SINT, 300 [PIPE_FORMAT_L8_SINT] = GEN6_FORMAT_L8_SINT, 301 [PIPE_FORMAT_L8A8_SINT] = GEN6_FORMAT_L8A8_SINT, 302 [PIPE_FORMAT_A16_UINT] = 0, 303 [PIPE_FORMAT_I16_UINT] = 0, 304 [PIPE_FORMAT_L16_UINT] = 0, 305 [PIPE_FORMAT_L16A16_UINT] = 0, 306 [PIPE_FORMAT_A16_SINT] = 0, 307 [PIPE_FORMAT_I16_SINT] = 0, 308 [PIPE_FORMAT_L16_SINT] = 0, 309 [PIPE_FORMAT_L16A16_SINT] = 0, 310 [PIPE_FORMAT_A32_UINT] = 0, 311 [PIPE_FORMAT_I32_UINT] = 0, 312 [PIPE_FORMAT_L32_UINT] = 0, 313 [PIPE_FORMAT_L32A32_UINT] = 0, 314 [PIPE_FORMAT_A32_SINT] = 0, 315 [PIPE_FORMAT_I32_SINT] = 0, 316 [PIPE_FORMAT_L32_SINT] = 0, 317 [PIPE_FORMAT_L32A32_SINT] = 0, 318 [PIPE_FORMAT_B10G10R10A2_UINT] = GEN6_FORMAT_B10G10R10A2_UINT, 319 [PIPE_FORMAT_ETC1_RGB8] = GEN6_FORMAT_ETC1_RGB8, 320 [PIPE_FORMAT_R8G8_R8B8_UNORM] = 0, 321 [PIPE_FORMAT_G8R8_B8R8_UNORM] = 0, 322 [PIPE_FORMAT_R8G8B8X8_SNORM] = 0, 323 [PIPE_FORMAT_R8G8B8X8_SRGB] = 0, 324 [PIPE_FORMAT_R8G8B8X8_UINT] = 0, 325 [PIPE_FORMAT_R8G8B8X8_SINT] = 0, 326 [PIPE_FORMAT_B10G10R10X2_UNORM] = GEN6_FORMAT_B10G10R10X2_UNORM, 327 [PIPE_FORMAT_R16G16B16X16_UNORM] = GEN6_FORMAT_R16G16B16X16_UNORM, 328 [PIPE_FORMAT_R16G16B16X16_SNORM] = 0, 329 [PIPE_FORMAT_R16G16B16X16_FLOAT] = GEN6_FORMAT_R16G16B16X16_FLOAT, 330 [PIPE_FORMAT_R16G16B16X16_UINT] = 0, 331 [PIPE_FORMAT_R16G16B16X16_SINT] = 0, 332 [PIPE_FORMAT_R32G32B32X32_FLOAT] = GEN6_FORMAT_R32G32B32X32_FLOAT, 333 [PIPE_FORMAT_R32G32B32X32_UINT] = 0, 334 [PIPE_FORMAT_R32G32B32X32_SINT] = 0, 335 [PIPE_FORMAT_R8A8_SNORM] = 0, 336 [PIPE_FORMAT_R16A16_UNORM] = 0, 337 [PIPE_FORMAT_R16A16_SNORM] = 0, 338 [PIPE_FORMAT_R16A16_FLOAT] = 0, 339 [PIPE_FORMAT_R32A32_FLOAT] = 0, 340 [PIPE_FORMAT_R8A8_UINT] = 0, 341 [PIPE_FORMAT_R8A8_SINT] = 0, 342 [PIPE_FORMAT_R16A16_UINT] = 0, 343 [PIPE_FORMAT_R16A16_SINT] = 0, 344 [PIPE_FORMAT_R32A32_UINT] = 0, 345 [PIPE_FORMAT_R32A32_SINT] = 0, 346 [PIPE_FORMAT_R10G10B10A2_UINT] = GEN6_FORMAT_R10G10B10A2_UINT, 347 [PIPE_FORMAT_B5G6R5_SRGB] = GEN6_FORMAT_B5G6R5_UNORM_SRGB, 348 }; 349 int sfmt = format_mapping[format]; 350 351 /* GEN6_FORMAT_R32G32B32A32_FLOAT happens to be 0 */ 352 if (!sfmt && format != PIPE_FORMAT_R32G32B32A32_FLOAT) 353 sfmt = -1; 354 355 return sfmt; 356 } 357
