1 /* 2 * Copyright 2003 VMware, Inc. 3 * Copyright 2006 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25 /** 26 * \file intel_debug.c 27 * 28 * Support for the INTEL_DEBUG environment variable, along with other 29 * miscellaneous debugging code. 30 */ 31 32 #include "brw_context.h" 33 #include "intel_debug.h" 34 #include "util/u_atomic.h" /* for p_atomic_cmpxchg */ 35 #include "util/debug.h" 36 37 uint64_t INTEL_DEBUG = 0; 38 39 static const struct debug_control debug_control[] = { 40 { "tex", DEBUG_TEXTURE}, 41 { "state", DEBUG_STATE}, 42 { "blit", DEBUG_BLIT}, 43 { "mip", DEBUG_MIPTREE}, 44 { "fall", DEBUG_PERF}, 45 { "perf", DEBUG_PERF}, 46 { "perfmon", DEBUG_PERFMON}, 47 { "bat", DEBUG_BATCH}, 48 { "pix", DEBUG_PIXEL}, 49 { "buf", DEBUG_BUFMGR}, 50 { "fbo", DEBUG_FBO}, 51 { "fs", DEBUG_WM }, 52 { "gs", DEBUG_GS}, 53 { "sync", DEBUG_SYNC}, 54 { "prim", DEBUG_PRIMS }, 55 { "vert", DEBUG_VERTS }, 56 { "dri", DEBUG_DRI }, 57 { "sf", DEBUG_SF }, 58 { "stats", DEBUG_STATS }, 59 { "wm", DEBUG_WM }, 60 { "urb", DEBUG_URB }, 61 { "vs", DEBUG_VS }, 62 { "clip", DEBUG_CLIP }, 63 { "aub", DEBUG_AUB }, 64 { "shader_time", DEBUG_SHADER_TIME }, 65 { "no16", DEBUG_NO16 }, 66 { "blorp", DEBUG_BLORP }, 67 { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS }, 68 { "optimizer", DEBUG_OPTIMIZER }, 69 { "ann", DEBUG_ANNOTATION }, 70 { "no8", DEBUG_NO8 }, 71 { "vec4", DEBUG_VEC4VS }, 72 { "spill_fs", DEBUG_SPILL_FS }, 73 { "spill_vec4", DEBUG_SPILL_VEC4 }, 74 { "cs", DEBUG_CS }, 75 { "hex", DEBUG_HEX }, 76 { "nocompact", DEBUG_NO_COMPACTION }, 77 { "hs", DEBUG_TCS }, 78 { "tcs", DEBUG_TCS }, 79 { "ds", DEBUG_TES }, 80 { "tes", DEBUG_TES }, 81 { "l3", DEBUG_L3 }, 82 { "do32", DEBUG_DO32 }, 83 { "norbc", DEBUG_NO_RBC }, 84 { NULL, 0 } 85 }; 86 87 uint64_t 88 intel_debug_flag_for_shader_stage(gl_shader_stage stage) 89 { 90 uint64_t flags[] = { 91 [MESA_SHADER_VERTEX] = DEBUG_VS, 92 [MESA_SHADER_TESS_CTRL] = DEBUG_TCS, 93 [MESA_SHADER_TESS_EVAL] = DEBUG_TES, 94 [MESA_SHADER_GEOMETRY] = DEBUG_GS, 95 [MESA_SHADER_FRAGMENT] = DEBUG_WM, 96 [MESA_SHADER_COMPUTE] = DEBUG_CS, 97 }; 98 STATIC_ASSERT(MESA_SHADER_STAGES == 6); 99 return flags[stage]; 100 } 101 102 void 103 brw_process_intel_debug_variable(void) 104 { 105 uint64_t intel_debug = parse_debug_string(getenv("INTEL_DEBUG"), debug_control); 106 (void) p_atomic_cmpxchg(&INTEL_DEBUG, 0, intel_debug); 107 } 108
