1 /************************************************************************** 2 3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 4 VA Linux Systems Inc., Fremont, California. 5 6 All Rights Reserved. 7 8 Permission is hereby granted, free of charge, to any person obtaining 9 a copy of this software and associated documentation files (the 10 "Software"), to deal in the Software without restriction, including 11 without limitation the rights to use, copy, modify, merge, publish, 12 distribute, sublicense, and/or sell copies of the Software, and to 13 permit persons to whom the Software is furnished to do so, subject to 14 the following conditions: 15 16 The above copyright notice and this permission notice (including the 17 next paragraph) shall be included in all copies or substantial 18 portions of the Software. 19 20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27 28 **************************************************************************/ 29 30 /* 31 * Authors: 32 * Kevin E. Martin <martin (at) valinux.com> 33 * Gareth Hughes <gareth (at) valinux.com> 34 */ 35 36 #ifndef __RADEON_IOCTL_H__ 37 #define __RADEON_IOCTL_H__ 38 39 #include "radeon_bo_gem.h" 40 #include "radeon_cs_gem.h" 41 42 extern void radeonEmitVertexAOS( r100ContextPtr rmesa, 43 GLuint vertex_size, 44 struct radeon_bo *bo, 45 GLuint offset ); 46 47 extern void radeonEmitVbufPrim( r100ContextPtr rmesa, 48 GLuint vertex_format, 49 GLuint primitive, 50 GLuint vertex_nr ); 51 52 extern void radeonFlushElts( struct gl_context *ctx ); 53 54 55 extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa, 56 GLuint vertex_format, 57 GLuint primitive, 58 GLuint min_nr ); 59 60 61 extern void radeonEmitAOS( r100ContextPtr rmesa, 62 GLuint n, 63 GLuint offset ); 64 65 extern void radeonEmitBlit( r100ContextPtr rmesa, 66 GLuint color_fmt, 67 GLuint src_pitch, 68 GLuint src_offset, 69 GLuint dst_pitch, 70 GLuint dst_offset, 71 GLint srcx, GLint srcy, 72 GLint dstx, GLint dsty, 73 GLuint w, GLuint h ); 74 75 extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags ); 76 77 extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * ); 78 79 extern void radeonFlush( struct gl_context *ctx ); 80 extern void radeonFinish( struct gl_context *ctx ); 81 extern void radeonInitIoctlFuncs( struct gl_context *ctx ); 82 extern void radeonGetAllParams( r100ContextPtr rmesa ); 83 extern void radeonSetUpAtomList( r100ContextPtr rmesa ); 84 85 /* ================================================================ 86 * Helper macros: 87 */ 88 89 /* Close off the last primitive, if it exists. 90 */ 91 #define RADEON_NEWPRIM( rmesa ) \ 92 do { \ 93 if ( rmesa->radeon.dma.flush ) \ 94 rmesa->radeon.dma.flush( &rmesa->radeon.glCtx ); \ 95 } while (0) 96 97 /* Can accommodate several state changes and primitive changes without 98 * actually firing the buffer. 99 */ 100 101 #define RADEON_STATECHANGE( rmesa, ATOM ) \ 102 do { \ 103 RADEON_NEWPRIM( rmesa ); \ 104 rmesa->hw.ATOM.dirty = GL_TRUE; \ 105 rmesa->radeon.hw.is_dirty = GL_TRUE; \ 106 } while (0) 107 108 #define RADEON_DB_STATE( ATOM ) \ 109 memcpy( rmesa->hw.ATOM.lastcmd, rmesa->hw.ATOM.cmd, \ 110 rmesa->hw.ATOM.cmd_size * 4) 111 112 static inline int RADEON_DB_STATECHANGE(r100ContextPtr rmesa, 113 struct radeon_state_atom *atom ) 114 { 115 if (memcmp(atom->cmd, atom->lastcmd, atom->cmd_size*4)) { 116 GLuint *tmp; 117 RADEON_NEWPRIM( rmesa ); 118 atom->dirty = GL_TRUE; 119 rmesa->radeon.hw.is_dirty = GL_TRUE; 120 tmp = atom->cmd; 121 atom->cmd = atom->lastcmd; 122 atom->lastcmd = tmp; 123 return 1; 124 } 125 else 126 return 0; 127 } 128 129 /* Command lengths. Note that any time you ensure ELTS_BUFSZ or VBUF_BUFSZ 130 * are available, you will also be adding an rmesa->state.max_state_size because 131 * r200EmitState is called from within r200EmitVbufPrim and r200FlushElts. 132 */ 133 #if RADEON_OLD_PACKETS 134 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2))+nr*2) 135 #define VERT_AOS_BUFSZ (0) 136 #define ELTS_BUFSZ(nr) (24 + nr * 2) 137 #define VBUF_BUFSZ (8) 138 #else 139 #define AOS_BUFSZ(nr) ((3 + ((nr / 2) * 3) + ((nr & 1) * 2) + nr*2)) 140 #define VERT_AOS_BUFSZ (5) 141 #define ELTS_BUFSZ(nr) (16 + nr * 2) 142 #define VBUF_BUFSZ (4) 143 #endif 144 #define SCISSOR_BUFSZ (8) 145 #define INDEX_BUFSZ (7) 146 147 148 static inline uint32_t cmdpacket3(int cmd_type) 149 { 150 drm_radeon_cmd_header_t cmd; 151 152 cmd.i = 0; 153 cmd.header.cmd_type = cmd_type; 154 155 return (uint32_t)cmd.i; 156 157 } 158 159 #define OUT_BATCH_PACKET3(packet, num_extra) do { \ 160 OUT_BATCH(CP_PACKET2); \ 161 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \ 162 } while(0) 163 164 #define OUT_BATCH_PACKET3_CLIP(packet, num_extra) do { \ 165 OUT_BATCH(CP_PACKET2); \ 166 OUT_BATCH(CP_PACKET3((packet), (num_extra))); \ 167 } while(0) 168 169 170 #endif /* __RADEON_IOCTL_H__ */ 171
