1 ; RUN: llvm-as %s -o %t.bc 2 ; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt 3 ; RUN: FileCheck < %t.txt %s --check-prefix=CHECK-SPIRV 4 ; RUN: llvm-spirv %t.bc -o %t.spv 5 ; RUN: llvm-spirv -r %t.spv -o %t.rev.bc 6 ; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM 7 8 ; CHECK-SPIRV: 4 GenericPtrMemSemantics {{[0-9]+}} [[ResID:[0-9]+]] {{[0-9]+}} 9 ; CHECK-SPIRV-NEXT: 5 ShiftRightLogical {{[0-9]+}} {{[0-9]+}} [[ResID]] {{[0-9]+}} 10 11 ; Note that round-trip conversion replaces 'get_fence (gentype *ptr)' built-in function with 'get_fence (const gentype *ptr)'. 12 ; CHECK-LLVM: call spir_func i32 @_Z9get_fencePKU3AS4v(i8 13 ; CHECK-LLVM-NEXT: shl 14 ; CHECK-LLVM-NEXT: lshr 15 16 target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024" 17 target triple = "spir-unknown-unknown" 18 19 @gint = addrspace(1) global i32 1, align 4 20 21 ; Function Attrs: nounwind readnone 22 define spir_func i32 @isFenceValid(i32 %fence) #0 { 23 entry: 24 %switch = icmp ult i32 %fence, 4 25 %. = zext i1 %switch to i32 26 ret i32 %. 27 } 28 29 ; Function Attrs: nounwind 30 define spir_func i32 @f4(i32 %val, i32 addrspace(4)* %ptr) #1 { 31 entry: 32 %0 = bitcast i32 addrspace(4)* %ptr to i8 addrspace(4)* 33 %call = tail call spir_func i32 @_Z9get_fencePU3AS4v(i8 addrspace(4)* %0) #3 34 %switch.i = icmp ult i32 %call, 4 35 %1 = load i32, i32 addrspace(4)* %ptr, align 4 36 %cmp = icmp eq i32 %1, %val 37 %and4 = and i1 %switch.i, %cmp 38 %and = zext i1 %and4 to i32 39 %2 = xor i32 %and, 1 40 ret i32 %2 41 } 42 43 declare spir_func i32 @_Z9get_fencePU3AS4v(i8 addrspace(4)*) #2 44 45 ; Function Attrs: nounwind 46 define spir_kernel void @testKernel(i32 addrspace(1)* nocapture %results) #1 { 47 entry: 48 %call = tail call spir_func i32 @_Z13get_global_idj(i32 0) #3 49 %0 = load i32, i32 addrspace(1)* @gint, align 4 50 %call.i = tail call spir_func i32 @_Z9get_fencePU3AS4v(i8 addrspace(4)* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @gint to i8 addrspace(1)*) to i8 addrspace(4)*)) #3 51 %switch.i.i = icmp ult i32 %call.i, 4 52 %1 = load i32, i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @gint to i32 addrspace(4)*), align 4 53 %cmp.i = icmp eq i32 %1, %0 54 %and4.i = and i1 %switch.i.i, %cmp.i 55 %cond = zext i1 %and4.i to i32 56 %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %results, i32 %call 57 store i32 %cond, i32 addrspace(1)* %arrayidx, align 4 58 ret void 59 } 60 61 declare spir_func i32 @_Z13get_global_idj(i32) #2 62 63 attributes #0 = { nounwind readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 64 attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 65 attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } 66 attributes #3 = { nounwind } 67 68 !opencl.kernels = !{!0} 69 !opencl.enable.FP_CONTRACT = !{} 70 !opencl.spir.version = !{!6} 71 !opencl.ocl.version = !{!7} 72 !opencl.used.extensions = !{!8} 73 !opencl.used.optional.core.features = !{!8} 74 !opencl.compiler.options = !{!8} 75 76 !0 = !{void (i32 addrspace(1)*)* @testKernel, !1, !2, !3, !4, !5} 77 !1 = !{!"kernel_arg_addr_space", i32 1} 78 !2 = !{!"kernel_arg_access_qual", !"none"} 79 !3 = !{!"kernel_arg_type", !"uint*"} 80 !4 = !{!"kernel_arg_base_type", !"uint*"} 81 !5 = !{!"kernel_arg_type_qual", !""} 82 !6 = !{i32 1, i32 2} 83 !7 = !{i32 2, i32 0} 84 !8 = !{} 85
