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Alpha.h21-Aug-20181.3K
Alpha.td21-Aug-20182.4K
AlphaAsmPrinter.cpp21-Aug-20185.4K
AlphaBranchSelector.cpp21-Aug-20181.9K
AlphaCallingConv.td21-Aug-20181.7K
AlphaFrameLowering.cpp21-Aug-20184.9K
AlphaFrameLowering.h21-Aug-20181.2K
AlphaInstrFormats.td21-Aug-20186.9K
AlphaInstrInfo.cpp21-Aug-201812.8K
AlphaInstrInfo.h21-Aug-20183.5K
AlphaInstrInfo.td21-Aug-201858K
AlphaISelDAGToDAG.cpp21-Aug-201815.4K
AlphaISelLowering.cpp21-Aug-201836.9K
AlphaISelLowering.h21-Aug-20185.2K
AlphaLLRP.cpp21-Aug-20185.6K
AlphaMachineFunctionInfo.h21-Aug-20182.2K
AlphaRegisterInfo.cpp21-Aug-20186.3K
AlphaRegisterInfo.h21-Aug-20181.6K
AlphaRegisterInfo.td21-Aug-20184.9K
AlphaRelocations.h21-Aug-2018780
AlphaSchedule.td21-Aug-20183.1K
AlphaSelectionDAGInfo.cpp21-Aug-2018749
AlphaSelectionDAGInfo.h21-Aug-2018832
AlphaSubtarget.cpp21-Aug-20181.1K
AlphaSubtarget.h21-Aug-20181.3K
AlphaTargetMachine.cpp21-Aug-20181.8K
AlphaTargetMachine.h21-Aug-20182.1K
Makefile21-Aug-2018700
MCTargetDesc/21-Aug-2018
README.txt21-Aug-20181,023
TargetInfo/21-Aug-2018

README.txt

      1 ***
      2 
      3 add gcc builtins for alpha instructions
      4 
      5 
      6 ***
      7 
      8 custom expand byteswap into nifty 
      9 extract/insert/mask byte/word/longword/quadword low/high
     10 sequences
     11 
     12 ***
     13 
     14 see if any of the extract/insert/mask operations can be added
     15 
     16 ***
     17 
     18 match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)
     19 
     20 ***
     21 
     22 lower srem and urem
     23 
     24 remq(i,j):  i - (j * divq(i,j)) if j != 0
     25 remqu(i,j): i - (j * divqu(i,j)) if j != 0
     26 reml(i,j):  i - (j * divl(i,j)) if j != 0
     27 remlu(i,j): i - (j * divlu(i,j)) if j != 0
     28 
     29 ***
     30 
     31 add crazy vector instructions (MVI):
     32 
     33 (MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
     34 PKWB, UNPKBW pack/unpack word to byte
     35 PKLB UNPKBL pack/unpack long to byte
     36 PERR pixel error (sum across bytes of bytewise abs(i8v8 a - i8v8 b))
     37 
     38 cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extensions)
     39 
     40 this has some good examples for other operations that can be synthesised well 
     41 from these rather meager vector ops (such as saturating add).
     42 http://www.alphalinux.org/docs/MVI-full.html
     43