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231 <AdditionalInputs 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232 <AdditionalInputs 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246 <AdditionalInputs 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247 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenAsmWriter.inc</Outputs> 248 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenAsmWriter.inc</Outputs> 249 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenAsmWriter.inc...</Message> 250 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenAsmWriter.inc...</Message> 251 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenAsmWriter.inc...</Message> 252 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenAsmWriter.inc...</Message> 253 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc</Command> 254 <Command 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259 <AdditionalInputs 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260 <AdditionalInputs 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261 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">X86GenAsmWriter.inc</Outputs> 262 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">X86GenAsmWriter.inc</Outputs> 263 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|x64'">X86GenAsmWriter.inc</Outputs> 264 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">X86GenAsmWriter.inc</Outputs> 265 </CustomBuild> 266 </ItemGroup> 267 <ItemGroup> 268 <CustomBuild Include="X86GenAsmWriter1.inc"> 269 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Building X86GenAsmWriter1.inc...</Message> 270 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">Building X86GenAsmWriter1.inc...</Message> 271 <Command Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc</Command> 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Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 275 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenAsmWriter1.inc</Outputs> 276 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenAsmWriter1.inc</Outputs> 277 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenAsmWriter1.inc...</Message> 278 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenAsmWriter1.inc...</Message> 279 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenAsmWriter1.inc...</Message> 280 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenAsmWriter1.inc...</Message> 281 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc</Command> 282 <Command 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286 <AdditionalInputs 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287 <AdditionalInputs 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288 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 289 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">X86GenAsmWriter1.inc</Outputs> 290 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">X86GenAsmWriter1.inc</Outputs> 291 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|x64'">X86GenAsmWriter1.inc</Outputs> 292 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">X86GenAsmWriter1.inc</Outputs> 293 </CustomBuild> 294 </ItemGroup> 295 <ItemGroup> 296 <CustomBuild Include="X86GenAsmMatcher.inc"> 297 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Building X86GenAsmMatcher.inc...</Message> 298 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">Building X86GenAsmMatcher.inc...</Message> 299 <Command Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc</Command> 300 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Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 302 <AdditionalInputs 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303 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenAsmMatcher.inc</Outputs> 304 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenAsmMatcher.inc</Outputs> 305 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenAsmMatcher.inc...</Message> 306 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenAsmMatcher.inc...</Message> 307 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenAsmMatcher.inc...</Message> 308 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenAsmMatcher.inc...</Message> 309 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc</Command> 310 <Command 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314 <AdditionalInputs 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315 <AdditionalInputs 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316 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 317 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">X86GenAsmMatcher.inc</Outputs> 318 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">X86GenAsmMatcher.inc</Outputs> 319 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|x64'">X86GenAsmMatcher.inc</Outputs> 320 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">X86GenAsmMatcher.inc</Outputs> 321 </CustomBuild> 322 </ItemGroup> 323 <ItemGroup> 324 <CustomBuild Include="X86GenDAGISel.inc"> 325 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Building X86GenDAGISel.inc...</Message> 326 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">Building X86GenDAGISel.inc...</Message> 327 <Command Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc</Command> 328 <Command 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330 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 331 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenDAGISel.inc</Outputs> 332 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenDAGISel.inc</Outputs> 333 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenDAGISel.inc...</Message> 334 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenDAGISel.inc...</Message> 335 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenDAGISel.inc...</Message> 336 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenDAGISel.inc...</Message> 337 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc</Command> 338 <Command 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343 <AdditionalInputs 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344 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 345 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">X86GenDAGISel.inc</Outputs> 346 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">X86GenDAGISel.inc</Outputs> 347 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|x64'">X86GenDAGISel.inc</Outputs> 348 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">X86GenDAGISel.inc</Outputs> 349 </CustomBuild> 350 </ItemGroup> 351 <ItemGroup> 352 <CustomBuild Include="X86GenFastISel.inc"> 353 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Building X86GenFastISel.inc...</Message> 354 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">Building X86GenFastISel.inc...</Message> 355 <Command Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc</Command> 356 <Command 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358 <AdditionalInputs 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359 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenFastISel.inc</Outputs> 360 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenFastISel.inc</Outputs> 361 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenFastISel.inc...</Message> 362 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenFastISel.inc...</Message> 363 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenFastISel.inc...</Message> 364 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenFastISel.inc...</Message> 365 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc</Command> 366 <Command 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370 <AdditionalInputs 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371 <AdditionalInputs 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372 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs)</AdditionalInputs> 373 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">X86GenFastISel.inc</Outputs> 374 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">X86GenFastISel.inc</Outputs> 375 <Outputs Condition="'$(Configuration)|$(Platform)'=='Release|x64'">X86GenFastISel.inc</Outputs> 376 <Outputs Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">X86GenFastISel.inc</Outputs> 377 </CustomBuild> 378 </ItemGroup> 379 <ItemGroup> 380 <CustomBuild Include="X86GenCallingConv.inc"> 381 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Building X86GenCallingConv.inc...</Message> 382 <Message Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">Building X86GenCallingConv.inc...</Message> 383 <Command Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc</Command> 384 <Command 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386 <AdditionalInputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs)</AdditionalInputs> 387 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">X86GenCallingConv.inc</Outputs> 388 <Outputs Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">X86GenCallingConv.inc</Outputs> 389 <Message Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">Building X86GenCallingConv.inc...</Message> 390 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|Win32'">Building X86GenCallingConv.inc...</Message> 391 <Message Condition="'$(Configuration)|$(Platform)'=='Release|x64'">Building X86GenCallingConv.inc...</Message> 392 <Message Condition="'$(Configuration)|$(Platform)'=='Profile|x64'">Building X86GenCallingConv.inc...</Message> 393 <Command Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc</Command> 394 <Command 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Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">$(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs)</AdditionalInputs> 398 <AdditionalInputs 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399 <AdditionalInputs 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400 <AdditionalInputs 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