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      1 ; RUN: llc < %s -march=cellspu > %t1.s
      2 ; RUN: grep lqa        %t1.s | count 13
      3 ; RUN: grep ilhu       %t1.s | count 15
      4 ; RUN: grep ila        %t1.s | count 1
      5 ; RUN: grep -w il      %t1.s | count 6
      6 ; RUN: grep shufb      %t1.s | count 13
      7 ; RUN: grep      65520 %t1.s | count  1
      8 ; RUN: grep      43981 %t1.s | count  1
      9 ; RUN: grep      13702 %t1.s | count  1
     10 ; RUN: grep      28225 %t1.s | count  1
     11 ; RUN: grep      30720 %t1.s | count  1
     12 ; RUN: grep 3233857728 %t1.s | count  8
     13 ; RUN: grep 2155905152 %t1.s | count  6
     14 ; RUN: grep      66051 %t1.s | count  7
     15 ; RUN: grep  471670303 %t1.s | count 11
     16 
     17 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
     18 target triple = "spu"
     19 
     20 ;  1311768467750121234 => 0x 12345678 abcdef12 (4660,22136/43981,61202)
     21 ; 18446744073709551591 => 0x ffffffff ffffffe7 (-25)
     22 ; 18446744073708516742 => 0x ffffffff fff03586 (-1034874)
     23 ;              5308431 => 0x 00000000 0051000F
     24 ;  9223372038704560128 => 0x 80000000 6e417800
     25 
     26 define i64 @i64_const_1() {
     27   ret i64  1311768467750121234          ;; Constant pool spill
     28 }
     29 
     30 define i64 @i64_const_2() {
     31   ret i64 18446744073709551591          ;; IL/SHUFB
     32 }
     33 
     34 define i64 @i64_const_3() {
     35   ret i64 18446744073708516742          ;; IHLU/IOHL/SHUFB
     36 }
     37 
     38 define i64 @i64_const_4() {
     39   ret i64              5308431          ;; ILHU/IOHL/SHUFB
     40 }
     41 
     42 define i64 @i64_const_5() {
     43   ret i64                  511          ;; IL/SHUFB
     44 }
     45 
     46 define i64 @i64_const_6() {
     47   ret i64                 -512          ;; IL/SHUFB
     48 }
     49 
     50 define i64 @i64_const_7() {
     51   ret i64  9223372038704560128          ;; IHLU/IOHL/SHUFB
     52 }
     53 
     54 define i64 @i64_const_8() {
     55   ret i64 0                             ;; IL
     56 }
     57 
     58 define i64 @i64_const_9() {
     59   ret i64 -1                            ;; IL
     60 }
     61 
     62 define i64 @i64_const_10() {
     63   ret i64 281470681808895                ;; IL 65535
     64 }
     65 
     66 ; 0x4005bf0a8b145769 ->
     67 ;   (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906])
     68 ;   (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377])
     69 define double @f64_const_1() {
     70  ret double 0x4005bf0a8b145769        ;; ILHU/IOHL via pattern
     71 }
     72  
     73 define double @f64_const_2() {
     74  ret double 0x0010000000000000
     75 }
     76 
     77 define double @f64_const_3() {
     78  ret double 0x7fefffffffffffff
     79 }
     80 
     81 define double @f64_const_4() {
     82  ret double 0x400921fb54442d18
     83 }
     84  
     85 define double @f64_const_5() {
     86   ret double 0xbff6a09e667f3bcd         ;; ILHU/IOHL via pattern
     87 }
     88  
     89 define double @f64_const_6() {
     90   ret double 0x3ff6a09e667f3bcd
     91 }
     92 
     93 define double @f64_const_7() {
     94   ret double 0.000000e+00
     95 }
     96