1 ; RUN: llc < %s -march=cellspu | FileCheck %s 2 3 define i32 @subword( i32 %param1, i32 %param2) { 4 ; Check ordering of registers ret=param1-param2 -> rt=rb-ra 5 ; CHECK-NOT: sf $3, $3, $4 6 ; CHECK: sf $3, $4, $3 7 %1 = sub i32 %param1, %param2 8 ret i32 %1 9 } 10 11 define i16 @subhword( i16 %param1, i16 %param2) { 12 ; Check ordering of registers ret=param1-param2 -> rt=rb-ra 13 ; CHECK-NOT: sfh $3, $3, $4 14 ; CHECK: sfh $3, $4, $3 15 %1 = sub i16 %param1, %param2 16 ret i16 %1 17 } 18 19 define float @subfloat( float %param1, float %param2) { 20 ; Check ordering of registers ret=param1-param2 -> rt=ra-rb 21 ; (yes this is reverse of i32 instruction) 22 ; CHECK-NOT: fs $3, $4, $3 23 ; CHECK: fs $3, $3, $4 24 %1 = fsub float %param1, %param2 25 ret float %1 26 } 27
