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      1 ; RUN: llc < %s -march=cellspu > %t1.s
      2 ; RUN: grep cbd     %t1.s | count 5
      3 ; RUN: grep chd     %t1.s | count 5
      4 ; RUN: grep cwd     %t1.s | count 11
      5 ; RUN: grep -w il   %t1.s | count 5
      6 ; RUN: grep -w ilh  %t1.s | count 6
      7 ; RUN: grep iohl    %t1.s | count 1
      8 ; RUN: grep ilhu    %t1.s | count 4
      9 ; RUN: grep shufb   %t1.s | count 27
     10 ; RUN: grep 17219   %t1.s | count 1 
     11 ; RUN: grep 22598   %t1.s | count 1
     12 ; RUN: grep -- -39  %t1.s | count 1
     13 ; RUN: grep    24   %t1.s | count 1
     14 ; RUN: grep  1159   %t1.s | count 1
     15 ; RUN: FileCheck %s < %t1.s
     16 
     17 ; ModuleID = 'vecinsert.bc'
     18 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
     19 target triple = "spu-unknown-elf"
     20 
     21 ; 67 -> 0x43, as 8-bit vector constant load = 0x4343 (17219)0x4343
     22 define <16 x i8> @test_v16i8(<16 x i8> %P, i8 %x) {
     23 entry:
     24         %tmp1 = insertelement <16 x i8> %P, i8 %x, i32 10
     25         %tmp1.1 = insertelement <16 x i8> %tmp1, i8 67, i32 7
     26         %tmp1.2 = insertelement <16 x i8> %tmp1.1, i8 %x, i32 15
     27         ret <16 x i8> %tmp1.2
     28 }
     29 
     30 ; 22598 -> 0x5846
     31 define <8 x i16> @test_v8i16(<8 x i16> %P, i16 %x) {
     32 entry:
     33         %tmp1 = insertelement <8 x i16> %P, i16 %x, i32 5
     34         %tmp1.1 = insertelement <8 x i16> %tmp1, i16 22598, i32 7
     35         %tmp1.2 = insertelement <8 x i16> %tmp1.1, i16 %x, i32 2
     36         ret <8 x i16> %tmp1.2
     37 }
     38 
     39 ; 1574023 -> 0x180487 (ILHU 24/IOHL 1159)
     40 define <4 x i32> @test_v4i32_1(<4 x i32> %P, i32 %x) {
     41 entry:
     42         %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
     43         %tmp1.1 = insertelement <4 x i32> %tmp1, i32 1574023, i32 1
     44         %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
     45         ret <4 x i32> %tmp1.2
     46 }
     47 
     48 ; Should generate IL for the load
     49 define <4 x i32> @test_v4i32_2(<4 x i32> %P, i32 %x) {
     50 entry:
     51         %tmp1 = insertelement <4 x i32> %P, i32 %x, i32 2
     52         %tmp1.1 = insertelement <4 x i32> %tmp1, i32 -39, i32 1
     53         %tmp1.2 = insertelement <4 x i32> %tmp1.1, i32 %x, i32 3
     54         ret <4 x i32> %tmp1.2
     55 }
     56 
     57 define void @variable_v16i8_1(<16 x i8>* %a, i32 %i) nounwind {
     58 entry:
     59 	%arrayidx = getelementptr <16 x i8>* %a, i32 %i
     60 	%tmp2 = load <16 x i8>* %arrayidx
     61 	%tmp3 = insertelement <16 x i8> %tmp2, i8 1, i32 1
     62 	%tmp8 = insertelement <16 x i8> %tmp3, i8 2, i32 11
     63 	store <16 x i8> %tmp8, <16 x i8>* %arrayidx
     64 	ret void
     65 }
     66 
     67 define void @variable_v8i16_1(<8 x i16>* %a, i32 %i) nounwind {
     68 entry:
     69 	%arrayidx = getelementptr <8 x i16>* %a, i32 %i
     70 	%tmp2 = load <8 x i16>* %arrayidx
     71 	%tmp3 = insertelement <8 x i16> %tmp2, i16 1, i32 1
     72 	%tmp8 = insertelement <8 x i16> %tmp3, i16 2, i32 6
     73 	store <8 x i16> %tmp8, <8 x i16>* %arrayidx
     74 	ret void
     75 }
     76 
     77 define void @variable_v4i32_1(<4 x i32>* %a, i32 %i) nounwind {
     78 entry:
     79 	%arrayidx = getelementptr <4 x i32>* %a, i32 %i
     80 	%tmp2 = load <4 x i32>* %arrayidx
     81 	%tmp3 = insertelement <4 x i32> %tmp2, i32 1, i32 1
     82 	%tmp8 = insertelement <4 x i32> %tmp3, i32 2, i32 2
     83 	store <4 x i32> %tmp8, <4 x i32>* %arrayidx
     84 	ret void
     85 }
     86 
     87 define void @variable_v4f32_1(<4 x float>* %a, i32 %i) nounwind {
     88 entry:
     89 	%arrayidx = getelementptr <4 x float>* %a, i32 %i
     90 	%tmp2 = load <4 x float>* %arrayidx
     91 	%tmp3 = insertelement <4 x float> %tmp2, float 1.000000e+00, i32 1
     92 	%tmp8 = insertelement <4 x float> %tmp3, float 2.000000e+00, i32 2
     93 	store <4 x float> %tmp8, <4 x float>* %arrayidx
     94 	ret void
     95 }
     96 
     97 define void @variable_v2i64_1(<2 x i64>* %a, i32 %i) nounwind {
     98 entry:
     99 	%arrayidx = getelementptr <2 x i64>* %a, i32 %i
    100 	%tmp2 = load <2 x i64>* %arrayidx
    101 	%tmp3 = insertelement <2 x i64> %tmp2, i64 615, i32 0
    102 	store <2 x i64> %tmp3, <2 x i64>* %arrayidx
    103 	ret void
    104 }
    105 
    106 define void @variable_v2i64_2(<2 x i64>* %a, i32 %i) nounwind {
    107 entry:
    108 	%arrayidx = getelementptr <2 x i64>* %a, i32 %i
    109 	%tmp2 = load <2 x i64>* %arrayidx
    110 	%tmp3 = insertelement <2 x i64> %tmp2, i64 615, i32 1
    111 	store <2 x i64> %tmp3, <2 x i64>* %arrayidx
    112 	ret void
    113 }
    114 
    115 define void @variable_v2f64_1(<2 x double>* %a, i32 %i) nounwind {
    116 entry:
    117 	%arrayidx = getelementptr <2 x double>* %a, i32 %i
    118 	%tmp2 = load <2 x double>* %arrayidx
    119 	%tmp3 = insertelement <2 x double> %tmp2, double 1.000000e+00, i32 1
    120 	store <2 x double> %tmp3, <2 x double>* %arrayidx
    121 	ret void
    122 }
    123 
    124 define <4 x i32> @undef_v4i32( i32 %param ) {
    125 	;CHECK: cwd
    126 	;CHECK: lqa
    127 	;CHECK: shufb
    128 	%val = insertelement <4 x i32> <i32 1, i32 2, i32 3, i32 4>, i32 %param, i32 undef 
    129 	ret <4 x i32> %val
    130 }
    131 
    132