1 ; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR 2 3 define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) { 4 entry: 5 br label %bb 6 7 bb: ; preds = %cond_next391, %entry 8 %cnt.0 = phi i32 [ 0, %entry ], [ %tmp422445, %cond_next391 ] ; <i32> [#uses=1] 9 %v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ] ; <i32> [#uses=0] 10 br i1 false, label %cond_true, label %cond_next127 11 12 cond_true: ; preds = %bb 13 store i8* null, i8** %byteptr, align 4 14 store i8* null, i8** %byteptr, align 4 15 br label %cond_next127 16 17 cond_next127: ; preds = %cond_true, %bb 18 %tmp151 = add i32 0, %round ; <i32> [#uses=1] 19 %tmp153 = ashr i32 %tmp151, %scale ; <i32> [#uses=2] 20 %tmp154155 = trunc i32 %tmp153 to i16 ; <i16> [#uses=1] 21 %tmp154155156 = sext i16 %tmp154155 to i32 ; <i32> [#uses=1] 22 %tmp158 = xor i32 %tmp154155156, %tmp153 ; <i32> [#uses=1] 23 %tmp160 = or i32 %tmp158, %cnt.0 ; <i32> [#uses=1] 24 %tmp171 = load i32* %bitptr, align 4 ; <i32> [#uses=1] 25 %tmp180181 = sext i16 0 to i32 ; <i32> [#uses=3] 26 %tmp183 = add i32 %tmp160, 1 ; <i32> [#uses=1] 27 br i1 false, label %cond_true188, label %cond_next245 28 29 cond_true188: ; preds = %cond_next127 30 ret i16 0 31 32 cond_next245: ; preds = %cond_next127 33 %tmp249 = ashr i32 %tmp180181, 8 ; <i32> [#uses=1] 34 %tmp250 = add i32 %tmp171, %tmp249 ; <i32> [#uses=1] 35 %tmp253444 = lshr i32 %tmp180181, 4 ; <i32> [#uses=1] 36 %tmp254 = and i32 %tmp253444, 15 ; <i32> [#uses=1] 37 %tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=2] 38 %tmp264 = icmp ugt i32 %tmp250, 15 ; <i1> [#uses=1] 39 br i1 %tmp264, label %cond_true267, label %cond_next391 40 41 cond_true267: ; preds = %cond_next245 42 store i8* null, i8** %byteptr, align 4 43 store i8* null, i8** %byteptr, align 4 44 br i1 false, label %cond_true289, label %cond_next327 45 46 cond_true289: ; preds = %cond_true267 47 ret i16 0 48 49 cond_next327: ; preds = %cond_true267 50 br i1 false, label %cond_true343, label %cond_next385 51 52 cond_true343: ; preds = %cond_next327 53 %tmp345 = load i8** %byteptr, align 4 ; <i8*> [#uses=1] 54 store i8* null, i8** %byteptr, align 4 55 br i1 false, label %cond_next385, label %cond_true352 56 57 cond_true352: ; preds = %cond_true343 58 store i8* %tmp345, i8** %byteptr, align 4 59 br i1 false, label %cond_true364, label %cond_next385 60 61 cond_true364: ; preds = %cond_true352 62 ret i16 0 63 64 cond_next385: ; preds = %cond_true352, %cond_true343, %cond_next327 65 br label %cond_next391 66 67 cond_next391: ; preds = %cond_next385, %cond_next245 68 %tmp393 = load i32* %source, align 4 ; <i32> [#uses=1] 69 %tmp395 = load i32* %bitptr, align 4 ; <i32> [#uses=2] 70 %tmp396 = shl i32 %tmp393, %tmp395 ; <i32> [#uses=1] 71 %tmp398 = sub i32 32, %tmp256 ; <i32> [#uses=1] 72 %tmp405 = lshr i32 %tmp396, 31 ; <i32> [#uses=1] 73 %tmp406 = add i32 %tmp405, -1 ; <i32> [#uses=1] 74 %tmp409 = lshr i32 %tmp406, %tmp398 ; <i32> [#uses=1] 75 %tmp411 = sub i32 0, %tmp409 ; <i32> [#uses=1] 76 %tmp422445 = add i32 %tmp254, %tmp183 ; <i32> [#uses=2] 77 %tmp426447 = add i32 %tmp395, %tmp256 ; <i32> [#uses=1] 78 store i32 %tmp426447, i32* %bitptr, align 4 79 %tmp429448 = icmp ult i32 %tmp422445, 63 ; <i1> [#uses=1] 80 br i1 %tmp429448, label %bb, label %UnifiedReturnBlock 81 82 UnifiedReturnBlock: ; preds = %cond_next391 83 ret i16 0 84 } 85
