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      1 ; The register allocator can commute two-address instructions to avoid
      2 ; insertion of register-register copies.
      3 
      4 ; Make sure there are only 3 mov's for each testcase
      5 ; RUN: llc < %s -mtriple=i686-pc-linux-gnu   | FileCheck %s -check-prefix=LINUX
      6 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=DARWIN
      7 
      8 
      9 @G = external global i32                ; <i32*> [#uses=2]
     10 
     11 declare void @ext(i32)
     12 
     13 define i32 @t1(i32 %X, i32 %Y) nounwind {
     14 ; LINUX: t1:
     15 ; LINUX: movl 4(%esp), %eax
     16 ; LINUX: movl 8(%esp), %ecx
     17 ; LINUX: addl %eax, %ecx
     18 ; LINUX: movl %ecx, G
     19         %Z = add i32 %X, %Y             ; <i32> [#uses=1]
     20         store i32 %Z, i32* @G
     21         ret i32 %X
     22 }
     23 
     24 define i32 @t2(i32 %X, i32 %Y) nounwind {
     25 ; LINUX: t2:
     26 ; LINUX: movl 4(%esp), %eax
     27 ; LINUX: movl 8(%esp), %ecx
     28 ; LINUX: xorl %eax, %ecx
     29 ; LINUX: movl %ecx, G
     30         %Z = xor i32 %X, %Y             ; <i32> [#uses=1]
     31         store i32 %Z, i32* @G
     32         ret i32 %X
     33 }
     34 
     35 ; rdar://8762995
     36 %0 = type { i64, i32 }
     37 
     38 define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {
     39 entry:
     40 ; DARWIN: t3:
     41 ; DARWIN: shll $16
     42 ; DARWIN: shlq $32, %rcx
     43 ; DARWIN-NOT: leaq
     44 ; DARWIN: orq %rcx, %rax
     45   %tmp21 = zext i32 %lb to i64
     46   %tmp23 = zext i32 %ub to i64
     47   %tmp24 = shl i64 %tmp23, 32
     48   %ins26 = or i64 %tmp24, %tmp21
     49   %tmp28 = zext i8 %has_lb to i32
     50   %tmp33 = zext i8 %has_ub to i32
     51   %tmp34 = shl i32 %tmp33, 8
     52   %tmp38 = zext i8 %lb_inclusive to i32
     53   %tmp39 = shl i32 %tmp38, 16
     54   %tmp43 = zext i8 %ub_inclusive to i32
     55   %tmp44 = shl i32 %tmp43, 24
     56   %ins31 = or i32 %tmp39, %tmp28
     57   %ins36 = or i32 %ins31, %tmp34
     58   %ins46 = or i32 %ins36, %tmp44
     59   %tmp16 = insertvalue %0 undef, i64 %ins26, 0
     60   %tmp19 = insertvalue %0 %tmp16, i32 %ins46, 1
     61   ret %0 %tmp19
     62 }
     63