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      1 This file is a partial list of people who have contributed to the LLVM
      2 project.  If you have contributed a patch or made some other contribution to
      3 LLVM, please submit a patch to this file to add yourself, and it will be
      4 done!
      5 
      6 The list is sorted by surname and formatted to allow easy grepping and
      7 beautification by scripts.  The fields are: name (N), email (E), web-address
      8 (W), PGP key ID and fingerprint (P), description (D), snail-mail address
      9 (S), and (I) IRC handle.
     10 
     11 N: Vikram Adve
     12 E: vadve (a] cs.uiuc.edu
     13 W: http://www.cs.uiuc.edu/~vadve/
     14 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM
     15 
     16 N: Owen Anderson
     17 E: resistor (a] mac.com
     18 D: LCSSA pass and related LoopUnswitch work
     19 D: GVNPRE pass, DataLayout refactoring, random improvements
     20 
     21 N: Henrik Bach
     22 D: MingW Win32 API portability layer
     23 
     24 N: Aaron Ballman
     25 E: aaron (a] aaronballman.com
     26 D: __declspec attributes, Windows support, general bug fixing
     27 
     28 N: Nate Begeman
     29 E: natebegeman (a] mac.com
     30 D: PowerPC backend developer
     31 D: Target-independent code generator and analysis improvements
     32 
     33 N: Daniel Berlin
     34 E: dberlin (a] dberlin.org
     35 D: ET-Forest implementation.
     36 D: Sparse bitmap
     37 
     38 N: David Blaikie
     39 E: dblaikie (a] gmail.com
     40 D: General bug fixing/fit & finish, mostly in Clang
     41 
     42 N: Neil Booth
     43 E: neil (a] daikokuya.co.uk
     44 D: APFloat implementation.
     45 
     46 N: Misha Brukman
     47 E: brukman+llvm (a] uiuc.edu
     48 W: http://misha.brukman.net
     49 D: Portions of X86 and Sparc JIT compilers, PowerPC backend
     50 D: Incremental bitcode loader
     51 
     52 N: Cameron Buschardt
     53 E: buschard (a] uiuc.edu
     54 D: The `mem2reg' pass - promotes values stored in memory to registers
     55 
     56 N: Brendon Cahoon
     57 E: bcahoon (a] codeaurora.org
     58 D: Loop unrolling with run-time trip counts.
     59 
     60 N: Chandler Carruth
     61 E: chandlerc (a] gmail.com
     62 E: chandlerc (a] google.com
     63 D: Hashing algorithms and interfaces
     64 D: Inline cost analysis
     65 D: Machine block placement pass
     66 D: SROA
     67 
     68 N: Casey Carter
     69 E: ccarter (a] uiuc.edu
     70 D: Fixes to the Reassociation pass, various improvement patches
     71 
     72 N: Evan Cheng
     73 E: evan.cheng (a] apple.com
     74 D: ARM and X86 backends
     75 D: Instruction scheduler improvements
     76 D: Register allocator improvements
     77 D: Loop optimizer improvements
     78 D: Target-independent code generator improvements
     79 
     80 N: Dan Villiom Podlaski Christiansen
     81 E: danchr (a] gmail.com
     82 E: danchr (a] cs.au.dk
     83 W: http://villiom.dk
     84 D: LLVM Makefile improvements
     85 D: Clang diagnostic & driver tweaks
     86 S: Aarhus, Denmark
     87 
     88 N: Jeff Cohen
     89 E: jeffc (a] jolt-lang.org
     90 W: http://jolt-lang.org
     91 D: Native Win32 API portability layer
     92 
     93 N: John T. Criswell
     94 E: criswell (a] uiuc.edu
     95 D: Original Autoconf support, documentation improvements, bug fixes
     96 
     97 N: Anshuman Dasgupta
     98 E: adasgupt (a] codeaurora.org
     99 D: Deterministic finite automaton based infrastructure for VLIW packetization
    100 
    101 N: Stefanus Du Toit
    102 E: stefanus.du.toit (a] intel.com
    103 D: Bug fixes and minor improvements
    104 
    105 N: Rafael Avila de Espindola
    106 E: rafael.espindola (a] gmail.com
    107 D: The ARM backend
    108 
    109 N: Dave Estes
    110 E: cestes (a] codeaurora.org
    111 D: AArch64 machine description for Cortex-A53
    112 
    113 N: Alkis Evlogimenos
    114 E: alkis (a] evlogimenos.com
    115 D: Linear scan register allocator, many codegen improvements, Java frontend
    116 
    117 N: Hal Finkel
    118 E: hfinkel (a] anl.gov
    119 D: Basic-block autovectorization, PowerPC backend improvements
    120 
    121 N: Eric Fiselier
    122 E: eric (a] efcs.ca
    123 D: LIT patches and documentation.
    124 
    125 N: Ryan Flynn
    126 E: pizza (a] parseerror.com
    127 D: Miscellaneous bug fixes
    128 
    129 N: Brian Gaeke
    130 E: gaeke (a] uiuc.edu
    131 W: http://www.students.uiuc.edu/~gaeke/
    132 D: Portions of X86 static and JIT compilers; initial SparcV8 backend
    133 D: Dynamic trace optimizer
    134 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool
    135 
    136 N: Nicolas Geoffray
    137 E: nicolas.geoffray (a] lip6.fr
    138 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/
    139 D: PPC backend fixes for Linux
    140 
    141 N: Louis Gerbarg
    142 E: lgg (a] apple.com
    143 D: Portions of the PowerPC backend
    144 
    145 N: Saem Ghani
    146 E: saemghani (a] gmail.com
    147 D: Callgraph class cleanups
    148 
    149 N: Mikhail Glushenkov
    150 E: foldr (a] codedgers.com
    151 D: Author of llvmc2
    152 
    153 N: Dan Gohman
    154 E: sunfish (a] mozilla.com
    155 D: Miscellaneous bug fixes
    156 D: WebAssembly Backend
    157 
    158 N: David Goodwin
    159 E: david (a] goodwinz.net
    160 D: Thumb-2 code generator
    161 
    162 N: David Greene
    163 E: greened (a] obbligato.org
    164 D: Miscellaneous bug fixes
    165 D: Register allocation refactoring
    166 
    167 N: Gabor Greif
    168 E: ggreif (a] gmail.com
    169 D: Improvements for space efficiency
    170 
    171 N: James Grosbach
    172 E: grosbach (a] apple.com
    173 I: grosbach
    174 D: SjLj exception handling support
    175 D: General fixes and improvements for the ARM back-end
    176 D: MCJIT
    177 D: ARM integrated assembler and assembly parser
    178 D: Led effort for the backend formerly known as ARM64
    179 
    180 N: Lang Hames
    181 E: lhames (a] gmail.com
    182 D: PBQP-based register allocator
    183 
    184 N: Gordon Henriksen
    185 E: gordonhenriksen (a] mac.com
    186 D: Pluggable GC support
    187 D: C interface
    188 D: Ocaml bindings
    189 
    190 N: Raul Fernandes Herbster
    191 E: raul (a] dsc.ufcg.edu.br
    192 D: JIT support for ARM
    193 
    194 N: Paolo Invernizzi
    195 E: arathorn (a] fastwebnet.it
    196 D: Visual C++ compatibility fixes
    197 
    198 N: Patrick Jenkins
    199 E: patjenk (a] wam.umd.edu
    200 D: Nightly Tester
    201 
    202 N: Dale Johannesen
    203 E: dalej (a] apple.com
    204 D: ARM constant islands improvements
    205 D: Tail merging improvements
    206 D: Rewrite X87 back end
    207 D: Use APFloat for floating point constants widely throughout compiler
    208 D: Implement X87 long double
    209 
    210 N: Brad Jones
    211 E: kungfoomaster (a] nondot.org
    212 D: Support for packed types
    213 
    214 N: Rod Kay
    215 E: rkay (a] auroraux.org
    216 D: Author of LLVM Ada bindings
    217 
    218 N: Eric Kidd
    219 W: http://randomhacks.net/
    220 D: llvm-config script
    221 
    222 N: Anton Korobeynikov
    223 E: asl (a] math.spbu.ru
    224 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv.
    225 D: x86/linux PIC codegen, aliases, regparm/visibility attributes
    226 D: Switch lowering refactoring
    227 
    228 N: Sumant Kowshik
    229 E: kowshik (a] uiuc.edu
    230 D: Author of the original C backend
    231 
    232 N: Benjamin Kramer
    233 E: benny.kra (a] gmail.com
    234 D: Miscellaneous bug fixes
    235 
    236 N: Sundeep Kushwaha
    237 E: sundeepk (a] codeaurora.org
    238 D: Implemented DFA-based target independent VLIW packetizer
    239 
    240 N: Christopher Lamb
    241 E: christopher.lamb (a] gmail.com
    242 D: aligned load/store support, parts of noalias and restrict support
    243 D: vreg subreg infrastructure, X86 codegen improvements based on subregs
    244 D: address spaces
    245 
    246 N: Jim Laskey
    247 E: jlaskey (a] apple.com
    248 D: Improvements to the PPC backend, instruction scheduling
    249 D: Debug and Dwarf implementation
    250 D: Auto upgrade mangler
    251 D: llvm-gcc4 svn wrangler
    252 
    253 N: Chris Lattner
    254 E: sabre (a] nondot.org
    255 W: http://nondot.org/~sabre/
    256 D: Primary architect of LLVM
    257 
    258 N: Tanya Lattner (Tanya Brethour)
    259 E: tonic (a] nondot.org
    260 W: http://nondot.org/~tonic/
    261 D: The initial llvm-ar tool, converted regression testsuite to dejagnu
    262 D: Modulo scheduling in the SparcV9 backend
    263 D: Release manager (1.7+)
    264 
    265 N: Sylvestre Ledru
    266 E: sylvestre (a] debian.org
    267 W: http://sylvestre.ledru.info/
    268 W: http://llvm.org/apt/
    269 D: Debian and Ubuntu packaging
    270 D: Continuous integration with jenkins
    271 
    272 N: Andrew Lenharth
    273 E: alenhar2 (a] cs.uiuc.edu
    274 W: http://www.lenharth.org/~andrewl/
    275 D: Alpha backend
    276 D: Sampling based profiling
    277 
    278 N: Nick Lewycky
    279 E: nicholas (a] mxc.ca
    280 D: PredicateSimplifier pass
    281 
    282 N: Tony Linthicum, et. al.
    283 E: tlinth (a] codeaurora.org
    284 D: Backend for Qualcomm's Hexagon VLIW processor.
    285 
    286 N: Bruno Cardoso Lopes
    287 E: bruno.cardoso (a] gmail.com
    288 I: bruno
    289 W: http://brunocardoso.cc
    290 D: Mips backend
    291 D: Random ARM integrated assembler and assembly parser improvements
    292 D: General X86 AVX1 support
    293 
    294 N: Duraid Madina
    295 E: duraid (a] octopus.com.au
    296 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/
    297 D: IA64 backend, BigBlock register allocator
    298 
    299 N: John McCall
    300 E: rjmccall (a] apple.com
    301 D: Clang semantic analysis and IR generation
    302 
    303 N: Michael McCracken
    304 E: michael.mccracken (a] gmail.com
    305 D: Line number support for llvmgcc
    306 
    307 N: Vladimir Merzliakov
    308 E: wanderer (a] rsu.ru
    309 D: Test suite fixes for FreeBSD
    310 
    311 N: Scott Michel
    312 E: scottm (a] aero.org
    313 D: Added STI Cell SPU backend.
    314 
    315 N: Kai Nacke
    316 E: kai (a] redstar.de
    317 D: Support for implicit TLS model used with MS VC runtime
    318 D: Dumping of Win64 EH structures
    319 
    320 N: Takumi Nakamura
    321 E: geek4civic (a] gmail.com
    322 E: chapuni (a] hf.rim.or.jp
    323 D: Cygwin and MinGW support.
    324 D: Win32 tweaks.
    325 S: Yokohama, Japan
    326 
    327 N: Edward O'Callaghan
    328 E: eocallaghan (a] auroraux.org
    329 W: http://www.auroraux.org
    330 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl
    331 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings
    332 D: and error clean ups.
    333 
    334 N: Morten Ofstad
    335 E: morten (a] hue.no
    336 D: Visual C++ compatibility fixes
    337 
    338 N: Jakob Stoklund Olesen
    339 E: stoklund (a] 2pi.dk
    340 D: Machine code verifier
    341 D: Blackfin backend
    342 D: Fast register allocator
    343 D: Greedy register allocator
    344 
    345 N: Richard Osborne
    346 E: richard (a] xmos.com
    347 D: XCore backend
    348 
    349 N: Piotr Padlewski
    350 E: piotr.padlewski (a] gmail.com
    351 D: !invariant.group metadata and other intrinsics for devirtualization in clang
    352 
    353 N: Devang Patel
    354 E: dpatel (a] apple.com
    355 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
    356 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements
    357 D: Optimizer improvements, Loop Index Split
    358 
    359 N: Ana Pazos
    360 E: apazos (a] codeaurora.org
    361 D: Fixes and improvements to the AArch64 backend
    362 
    363 N: Wesley Peck
    364 E: peckw (a] wesleypeck.com
    365 W: http://wesleypeck.com/
    366 D: MicroBlaze backend
    367 
    368 N: Francois Pichet
    369 E: pichet2000 (a] gmail.com
    370 D: MSVC support
    371 
    372 N: Adrian Prantl
    373 E: aprantl (a] apple.com
    374 D: Debug Information
    375 
    376 N: Vladimir Prus
    377 W: http://vladimir_prus.blogspot.com
    378 E: ghost (a] cs.msu.su
    379 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass
    380 
    381 N: Kalle Raiskila
    382 E: kalle.rasikila (a] nokia.com
    383 D: Some bugfixes to CellSPU
    384 
    385 N: Xerxes Ranby
    386 E: xerxes (a] zafena.se
    387 D: Cmake dependency chain and various bug fixes
    388 
    389 N: Alex Rosenberg
    390 E: alexr (a] leftfield.org
    391 I: arosenberg
    392 D: ARM calling conventions rewrite, hard float support
    393 
    394 N: Chad Rosier
    395 E: mcrosier (a] codeaurora.org
    396 I: mcrosier
    397 D: AArch64 fast instruction selection pass
    398 D: Fixes and improvements to the ARM fast-isel pass
    399 D: Fixes and improvements to the AArch64 backend
    400 
    401 N: Nadav Rotem
    402 E: nadav.rotem (a] me.com
    403 D: X86 code generation improvements, Loop Vectorizer, SLP Vectorizer
    404 
    405 N: Roman Samoilov
    406 E: roman (a] codedgers.com
    407 D: MSIL backend
    408 
    409 N: Duncan Sands
    410 E: baldrick (a] free.fr
    411 I: baldrick
    412 D: Ada support in llvm-gcc
    413 D: Dragonegg plugin
    414 D: Exception handling improvements
    415 D: Type legalizer rewrite
    416 
    417 N: Ruchira Sasanka
    418 E: sasanka (a] uiuc.edu
    419 D: Graph coloring register allocator for the Sparc64 backend
    420 
    421 N: Arnold Schwaighofer
    422 E: arnold.schwaighofer (a] gmail.com
    423 D: Tail call optimization for the x86 backend
    424 
    425 N: Shantonu Sen
    426 E: ssen (a] apple.com
    427 D: Miscellaneous bug fixes
    428 
    429 N: Anand Shukla
    430 E: ashukla (a] cs.uiuc.edu
    431 D: The `paths' pass
    432 
    433 N: Michael J. Spencer
    434 E: bigcheesegs (a] gmail.com
    435 D: Shepherding Windows COFF support into MC.
    436 D: Lots of Windows stuff.
    437 
    438 N: Reid Spencer
    439 E: rspencer (a] reidspencer.com
    440 W: http://reidspencer.com/
    441 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid
    442 
    443 N: Alp Toker
    444 E: alp (a] nuanti.com
    445 W: http://atoker.com/
    446 D: C++ frontend next generation standards implementation
    447 
    448 N: Craig Topper
    449 E: craig.topper (a] gmail.com
    450 D: X86 codegen and disassembler improvements. AVX2 support.
    451 
    452 N: Edwin Torok
    453 E: edwintorok (a] gmail.com
    454 D: Miscellaneous bug fixes
    455 
    456 N: Adam Treat
    457 E: manyoso (a] yahoo.com
    458 D: C++ bugs filed, and C++ front-end bug fixes.
    459 
    460 N: Lauro Ramos Venancio
    461 E: lauro.venancio (a] indt.org.br
    462 D: ARM backend improvements
    463 D: Thread Local Storage implementation
    464 
    465 N: Bill Wendling
    466 I: wendling
    467 E: isanbard (a] gmail.com
    468 D: Release manager, IR Linker, LTO
    469 D: Bunches of stuff
    470 
    471 N: Bob Wilson
    472 E: bob.wilson (a] acm.org
    473 D: Advanced SIMD (NEON) support in the ARM backend.
    474