1 ; This tests the NaCl intrinsics memset, memcpy and memmove. 2 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 4 ; RUN: --target x8632 --sandbox -i %s --args -O2 \ 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: --target x8632 --sandbox -i %s --args -Om1 --fmem-intrin-opt \ 8 ; RUN: | %if --need=target_X8632 --command FileCheck %s 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 10 ; RUN: --target x8632 --sandbox -i %s --args -Om1 \ 11 ; RUN: | %if --need=target_X8632 --command FileCheck --check-prefix OM1 %s 12 13 ; RUN: %if --need=target_ARM32 \ 14 ; RUN: --command %p2i --filetype=obj --disassemble --target arm32 \ 15 ; RUN: -i %s --args -O2 \ 16 ; RUN: | %if --need=target_ARM32 \ 17 ; RUN: --command FileCheck --check-prefix ARM32 %s 18 19 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ 20 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\ 21 ; RUN: -i %s --args -Om1 \ 22 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ 23 ; RUN: --command FileCheck --check-prefix MIPS32 %s 24 25 declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) 26 declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) 27 declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i32, i1) 28 29 define internal void @test_memcpy(i32 %iptr_dst, i32 %iptr_src, i32 %len) { 30 entry: 31 %dst = inttoptr i32 %iptr_dst to i8* 32 %src = inttoptr i32 %iptr_src to i8* 33 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 34 i32 %len, i32 1, i1 false) 35 ret void 36 } 37 ; CHECK-LABEL: test_memcpy 38 ; CHECK: call {{.*}} R_{{.*}} memcpy 39 ; OM1-LABEL: test_memcpy 40 ; OM1: call {{.*}} memcpy 41 ; ARM32-LABEL: test_memcpy 42 ; ARM32: bl {{.*}} memcpy 43 ; MIPS32-LABEL: test_memcpy 44 ; MIPS32: jal {{.*}} memcpy 45 46 define internal void @test_memcpy_long_const_len(i32 %iptr_dst, i32 %iptr_src) { 47 entry: 48 %dst = inttoptr i32 %iptr_dst to i8* 49 %src = inttoptr i32 %iptr_src to i8* 50 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 51 i32 4876, i32 1, i1 false) 52 ret void 53 } 54 ; CHECK-LABEL: test_memcpy_long_const_len 55 ; CHECK: call {{.*}} R_{{.*}} memcpy 56 ; OM1-LABEL: test_memcpy_long_const_len 57 ; OM1: call {{.*}} memcpy 58 ; ARM32-LABEL: test_memcpy_long_const_len 59 ; ARM32: bl {{.*}} memcpy 60 ; MIPS32-LABEL: test_memcpy_long_const_len 61 ; MIPS32: jal {{.*}} memcpy 62 63 define internal void @test_memcpy_very_small_const_len(i32 %iptr_dst, 64 i32 %iptr_src) { 65 entry: 66 %dst = inttoptr i32 %iptr_dst to i8* 67 %src = inttoptr i32 %iptr_src to i8* 68 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 69 i32 2, i32 1, i1 false) 70 ret void 71 } 72 ; CHECK-LABEL: test_memcpy_very_small_const_len 73 ; CHECK: mov [[REG:[^,]*]],WORD PTR [{{.*}}] 74 ; CHECK-NEXT: mov WORD PTR [{{.*}}],[[REG]] 75 ; CHECK-NOT: mov 76 ; OM1-LABEL: test_memcpy_very_small_const_len 77 ; OM1: call {{.*}} memcpy 78 ; ARM32-LABEL: test_memcpy_very_small_const_len 79 ; ARM32: bl {{.*}} memcpy 80 ; MIPS32-LABEL: test_memcpy_very_small_const_len 81 ; MIPS32: jal {{.*}} memcpy 82 83 define internal void @test_memcpy_const_len_3(i32 %iptr_dst, i32 %iptr_src) { 84 entry: 85 %dst = inttoptr i32 %iptr_dst to i8* 86 %src = inttoptr i32 %iptr_src to i8* 87 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 88 i32 3, i32 1, i1 false) 89 ret void 90 } 91 ; CHECK-LABEL: test_memcpy_const_len_3 92 ; CHECK: mov [[REG:[^,]*]],WORD PTR [{{.*}}] 93 ; CHECK-NEXT: mov WORD PTR [{{.*}}],[[REG]] 94 ; CHECK-NEXT: mov [[REG:[^,]*]],BYTE PTR [{{.*}}+0x2] 95 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x2],[[REG]] 96 ; CHECK-NOT: mov 97 ; OM1-LABEL: test_memcpy_const_len_3 98 ; OM1: call {{.*}} memcpy 99 ; ARM32-LABEL: test_memcpy_const_len_3 100 ; ARM32: bl {{.*}} memcpy 101 ; MIPS32-LABEL: test_memcpy_const_len_3 102 ; MIPS32: jal {{.*}} memcpy 103 104 define internal void @test_memcpy_mid_const_len(i32 %iptr_dst, i32 %iptr_src) { 105 entry: 106 %dst = inttoptr i32 %iptr_dst to i8* 107 %src = inttoptr i32 %iptr_src to i8* 108 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 109 i32 9, i32 1, i1 false) 110 ret void 111 } 112 ; CHECK-LABEL: test_memcpy_mid_const_len 113 ; CHECK: movq [[REG:xmm[0-9]+]],QWORD PTR [{{.*}}] 114 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[REG]] 115 ; CHECK-NEXT: mov [[REG:[^,]*]],BYTE PTR [{{.*}}+0x8] 116 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],[[REG]] 117 ; CHECK-NOT: mov 118 ; OM1-LABEL: test_memcpy_mid_const_len 119 ; OM1: call {{.*}} memcpy 120 ; ARM32-LABEL: test_memcpy_mid_const_len 121 ; ARM32: bl {{.*}} memcpy 122 ; MIPS32-LABEL: test_memcpy_mid_const_len 123 ; MIPS32: jal {{.*}} memcpy 124 125 define internal void @test_memcpy_mid_const_len_overlap(i32 %iptr_dst, 126 i32 %iptr_src) { 127 entry: 128 %dst = inttoptr i32 %iptr_dst to i8* 129 %src = inttoptr i32 %iptr_src to i8* 130 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 131 i32 15, i32 1, i1 false) 132 ret void 133 } 134 ; CHECK-LABEL: test_memcpy_mid_const_len_overlap 135 ; CHECK: movq [[REG:xmm[0-9]+]],QWORD PTR [{{.*}}] 136 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[REG]] 137 ; CHECK-NEXT: movq [[REG:xmm[0-9]+]],QWORD PTR [{{.*}}+0x7] 138 ; CHECK-NEXT: movq QWORD PTR [{{.*}}+0x7],[[REG]] 139 ; CHECK-NOT: mov 140 ; OM1-LABEL: test_memcpy_mid_const_len_overlap 141 ; OM1: call {{.*}} memcpy 142 ; ARM32-LABEL: test_memcpy_mid_const_len_overlap 143 ; ARM32: bl {{.*}} memcpy 144 ; MIPS32-LABEL: test_memcpy_mid_const_len_overlap 145 ; MIPS32: jal {{.*}} memcpy 146 147 define internal void @test_memcpy_big_const_len_overlap(i32 %iptr_dst, 148 i32 %iptr_src) { 149 entry: 150 %dst = inttoptr i32 %iptr_dst to i8* 151 %src = inttoptr i32 %iptr_src to i8* 152 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 153 i32 30, i32 1, i1 false) 154 ret void 155 } 156 ; CHECK-LABEL: test_memcpy_big_const_len_overlap 157 ; CHECK: movups [[REG:xmm[0-9]+]],XMMWORD PTR [{{.*}}] 158 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[REG]] 159 ; CHECK-NEXT: movups [[REG:xmm[0-9]+]],XMMWORD PTR [{{.*}}+0xe] 160 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0xe],[[REG]] 161 ; CHECK-NOT: mov 162 ; OM1-LABEL: test_memcpy_big_const_len_overlap 163 ; OM1: call {{.*}} memcpy 164 ; ARM32-LABEL: test_memcpy_big_const_len_overlap 165 ; ARM32: bl {{.*}} memcpy 166 ; MIPS32-LABEL: test_memcpy_big_const_len_overlap 167 ; MIPS32: jal {{.*}} memcpy 168 169 define internal void @test_memcpy_large_const_len(i32 %iptr_dst, 170 i32 %iptr_src) { 171 entry: 172 %dst = inttoptr i32 %iptr_dst to i8* 173 %src = inttoptr i32 %iptr_src to i8* 174 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dst, i8* %src, 175 i32 33, i32 1, i1 false) 176 ret void 177 } 178 ; CHECK-LABEL: test_memcpy_large_const_len 179 ; CHECK: movups [[REG:xmm[0-9]+]],XMMWORD PTR [{{.*}}+0x10] 180 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[REG]] 181 ; CHECK-NEXT: movups [[REG:xmm[0-9]+]],XMMWORD PTR [{{.*}}] 182 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[REG]] 183 ; CHECK-NEXT: mov [[REG:[^,]*]],BYTE PTR [{{.*}}+0x20] 184 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],[[REG]] 185 ; CHECK-NOT: mov 186 ; OM1-LABEL: test_memcpy_large_const_len 187 ; OM1: call {{.*}} memcpy 188 ; ARM32-LABEL: test_memcpy_large_const_len 189 ; ARM32: bl {{.*}} memcpy 190 ; MIPS32-LABEL: test_memcpy_large_const_len 191 ; MIPS32: jal {{.*}} memcpy 192 193 define internal void @test_memmove(i32 %iptr_dst, i32 %iptr_src, i32 %len) { 194 entry: 195 %dst = inttoptr i32 %iptr_dst to i8* 196 %src = inttoptr i32 %iptr_src to i8* 197 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 198 i32 %len, i32 1, i1 false) 199 ret void 200 } 201 ; CHECK-LABEL: test_memmove 202 ; CHECK: call {{.*}} R_{{.*}} memmove 203 ; OM1-LABEL: test_memmove 204 ; OM1: call {{.*}} memmove 205 ; ARM32-LABEL: test_memmove 206 ; ARM32: bl {{.*}} memmove 207 ; MIPS32-LABEL: test_memmove 208 ; MIPS32: jal {{.*}} memmove 209 210 define internal void @test_memmove_long_const_len(i32 %iptr_dst, 211 i32 %iptr_src) { 212 entry: 213 %dst = inttoptr i32 %iptr_dst to i8* 214 %src = inttoptr i32 %iptr_src to i8* 215 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 216 i32 4876, i32 1, i1 false) 217 ret void 218 } 219 ; CHECK-LABEL: test_memmove_long_const_len 220 ; CHECK: call {{.*}} R_{{.*}} memmove 221 ; OM1-LABEL: test_memmove_long_const_len 222 ; OM1: call {{.*}} memmove 223 ; ARM32-LABEL: test_memmove_long_const_len 224 ; ARM32: bl {{.*}} memmove 225 ; MIPS32-LABEL: test_memmove_long_const_len 226 ; MIPS32: jal {{.*}} memmove 227 228 define internal void @test_memmove_very_small_const_len(i32 %iptr_dst, 229 i32 %iptr_src) { 230 entry: 231 %dst = inttoptr i32 %iptr_dst to i8* 232 %src = inttoptr i32 %iptr_src to i8* 233 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 234 i32 2, i32 1, i1 false) 235 ret void 236 } 237 ; CHECK-LABEL: test_memmove_very_small_const_len 238 ; CHECK: mov [[REG:[^,]*]],WORD PTR [{{.*}}] 239 ; CHECK-NEXT: mov WORD PTR [{{.*}}],[[REG]] 240 ; CHECK-NOT: mov 241 ; OM1-LABEL: test_memmove_very_small_const_len 242 ; OM1: call {{.*}} memmove 243 ; ARM32-LABEL: test_memmove_very_small_const_len 244 ; ARM32: bl {{.*}} memmove 245 ; MIPS32-LABEL: test_memmove_very_small_const_len 246 ; MIPS32: jal {{.*}} memmove 247 248 define internal void @test_memmove_const_len_3(i32 %iptr_dst, i32 %iptr_src) { 249 entry: 250 %dst = inttoptr i32 %iptr_dst to i8* 251 %src = inttoptr i32 %iptr_src to i8* 252 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 253 i32 3, i32 1, i1 false) 254 ret void 255 } 256 ; CHECK-LABEL: test_memmove_const_len_3 257 ; CHECK: mov [[REG0:[^,]*]],WORD PTR [{{.*}}] 258 ; CHECK-NEXT: mov [[REG1:[^,]*]],BYTE PTR [{{.*}}+0x2] 259 ; CHECK-NEXT: mov WORD PTR [{{.*}}],[[REG0]] 260 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x2],[[REG1]] 261 ; CHECK-NOT: mov 262 ; OM1-LABEL: test_memmove_const_len_3 263 ; OM1: call {{.*}} memmove 264 ; ARM32-LABEL: test_memmove_const_len_3 265 ; ARM32: bl {{.*}} memmove 266 ; MIPS32-LABEL: test_memmove_const_len_3 267 ; MIPS32: jal {{.*}} memmove 268 269 define internal void @test_memmove_mid_const_len(i32 %iptr_dst, i32 %iptr_src) { 270 entry: 271 %dst = inttoptr i32 %iptr_dst to i8* 272 %src = inttoptr i32 %iptr_src to i8* 273 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 274 i32 9, i32 1, i1 false) 275 ret void 276 } 277 ; CHECK-LABEL: test_memmove_mid_const_len 278 ; CHECK: movq [[REG0:xmm[0-9]+]],QWORD PTR [{{.*}}] 279 ; CHECK-NEXT: mov [[REG1:[^,]*]],BYTE PTR [{{.*}}+0x8] 280 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[REG0]] 281 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],[[REG1]] 282 ; CHECK-NOT: mov 283 ; OM1-LABEL: test_memmove_mid_const_len 284 ; OM1: call {{.*}} memmove 285 ; ARM32-LABEL: test_memmove_mid_const_len 286 ; ARM32: bl {{.*}} memmove 287 ; MIPS32-LABEL: test_memmove_mid_const_len 288 ; MIPS32: jal {{.*}} memmove 289 290 define internal void @test_memmove_mid_const_len_overlap(i32 %iptr_dst, 291 i32 %iptr_src) { 292 entry: 293 %dst = inttoptr i32 %iptr_dst to i8* 294 %src = inttoptr i32 %iptr_src to i8* 295 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 296 i32 15, i32 1, i1 false) 297 ret void 298 } 299 ; CHECK-LABEL: test_memmove_mid_const_len_overlap 300 ; CHECK: movq [[REG0:xmm[0-9]+]],QWORD PTR [{{.*}}] 301 ; CHECK-NEXT: movq [[REG1:xmm[0-9]+]],QWORD PTR [{{.*}}+0x7] 302 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[REG0]] 303 ; CHECK-NEXT: movq QWORD PTR [{{.*}}+0x7],[[REG1]] 304 ; CHECK-NOT: mov 305 ; OM1-LABEL: test_memmove_mid_const_len_overlap 306 ; OM1: call {{.*}} memmove 307 ; ARM32-LABEL: test_memmove_mid_const_len_overlap 308 ; ARM32: bl {{.*}} memmove 309 ; MIPS32-LABEL: test_memmove_mid_const_len_overlap 310 ; MIPS32: jal {{.*}} memmove 311 312 define internal void @test_memmove_big_const_len_overlap(i32 %iptr_dst, 313 i32 %iptr_src) { 314 entry: 315 %dst = inttoptr i32 %iptr_dst to i8* 316 %src = inttoptr i32 %iptr_src to i8* 317 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 318 i32 30, i32 1, i1 false) 319 ret void 320 } 321 ; CHECK-LABEL: test_memmove_big_const_len_overlap 322 ; CHECK: movups [[REG0:xmm[0-9]+]],XMMWORD PTR [{{.*}}] 323 ; CHECK-NEXT: movups [[REG1:xmm[0-9]+]],XMMWORD PTR [{{.*}}+0xe] 324 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[REG0]] 325 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0xe],[[REG1]] 326 ; CHECK-NOT: mov 327 ; OM1-LABEL: test_memmove_big_const_len_overlap 328 ; OM1: call {{.*}} memmove 329 ; ARM32-LABEL: test_memmove_big_const_len_overlap 330 ; ARM32: bl {{.*}} memmove 331 ; MIPS32-LABEL: test_memmove_big_const_len_overlap 332 ; MIPS32: jal {{.*}} memmove 333 334 define internal void @test_memmove_large_const_len(i32 %iptr_dst, 335 i32 %iptr_src) { 336 entry: 337 %dst = inttoptr i32 %iptr_dst to i8* 338 %src = inttoptr i32 %iptr_src to i8* 339 call void @llvm.memmove.p0i8.p0i8.i32(i8* %dst, i8* %src, 340 i32 33, i32 1, i1 false) 341 ret void 342 } 343 ; CHECK-LABEL: test_memmove_large_const_len 344 ; CHECK: movups [[REG0:xmm[0-9]+]],XMMWORD PTR [{{.*}}+0x10] 345 ; CHECK-NEXT: movups [[REG1:xmm[0-9]+]],XMMWORD PTR [{{.*}}] 346 ; CHECK-NEXT: mov [[REG2:[^,]*]],BYTE PTR [{{.*}}+0x20] 347 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[REG0]] 348 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[REG1]] 349 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],[[REG2]] 350 ; CHECK-NOT: mov 351 ; OM1-LABEL: test_memmove_large_const_len 352 ; OM1: call {{.*}} memmove 353 ; ARM32-LABEL: test_memmove_large_const_len 354 ; ARM32: bl {{.*}} memmove 355 ; MIPS32-LABEL: test_memmove_large_const_len 356 ; MIPS32: jal {{.*}} memmove 357 358 define internal void @test_memset(i32 %iptr_dst, i32 %wide_val, i32 %len) { 359 entry: 360 %val = trunc i32 %wide_val to i8 361 %dst = inttoptr i32 %iptr_dst to i8* 362 call void @llvm.memset.p0i8.i32(i8* %dst, i8 %val, 363 i32 %len, i32 1, i1 false) 364 ret void 365 } 366 ; CHECK-LABEL: test_memset 367 ; CHECK: movzx 368 ; CHECK: call {{.*}} R_{{.*}} memset 369 ; OM1-LABEL: test_memset 370 ; OM1: movzx 371 ; OM1: call {{.*}} R_{{.*}} memset 372 ; ARM32-LABEL: test_memset 373 ; ARM32: uxtb 374 ; ARM32: bl {{.*}} memset 375 ; MIPS32-LABEL: test_memset 376 ; MIPS32: jal {{.*}} memset 377 378 define internal void @test_memset_const_len_align(i32 %iptr_dst, 379 i32 %wide_val) { 380 entry: 381 %val = trunc i32 %wide_val to i8 382 %dst = inttoptr i32 %iptr_dst to i8* 383 call void @llvm.memset.p0i8.i32(i8* %dst, i8 %val, 384 i32 32, i32 1, i1 false) 385 ret void 386 } 387 ; CHECK-LABEL: test_memset_const_len_align 388 ; CHECK: movzx 389 ; CHECK: call {{.*}} R_{{.*}} memset 390 ; OM1-LABEL: test_memset_const_len_align 391 ; OM1: movzx 392 ; OM1: call {{.*}} R_{{.*}} memset 393 ; ARM32-LABEL: test_memset_const_len_align 394 ; ARM32: uxtb 395 ; ARM32: bl {{.*}} memset 396 ; MIPS32-LABEL: test_memset_const_len_align 397 ; MIPS32: jal {{.*}} memset 398 399 define internal void @test_memset_long_const_len_zero_val_align( 400 i32 %iptr_dst) { 401 entry: 402 %dst = inttoptr i32 %iptr_dst to i8* 403 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, 404 i32 4876, i32 1, i1 false) 405 ret void 406 } 407 ; CHECK-LABEL: test_memset_long_const_len_zero_val_align 408 ; CHECK: call {{.*}} R_{{.*}} memset 409 ; OM1-LABEL: test_memset_long_const_len_zero_val_align 410 ; OM1: call {{.*}} R_{{.*}} memset 411 ; ARM32-LABEL: test_memset_long_const_len_zero_val_align 412 ; ARM32: uxtb 413 ; ARM32: bl {{.*}} memset 414 ; MIPS32-LABEL: test_memset_long_const_len_zero_val_align 415 ; MIPS32: jal {{.*}} memset 416 417 define internal void @test_memset_const_val(i32 %iptr_dst, i32 %len) { 418 entry: 419 %dst = inttoptr i32 %iptr_dst to i8* 420 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 %len, i32 1, i1 false) 421 ret void 422 } 423 ; CHECK-LABEL: test_memset_const_val 424 ; CHECK-NOT: movzx 425 ; CHECK: call {{.*}} R_{{.*}} memset 426 ; OM1-LABEL: test_memset_const_val 427 ; OM1: call {{.*}} R_{{.*}} memset 428 ; ARM32-LABEL: test_memset_const_val 429 ; ARM32: uxtb 430 ; ARM32: bl {{.*}} memset 431 ; MIPS32-LABEL: test_memset_const_val 432 ; MIPS32: jal {{.*}} memset 433 434 define internal void @test_memset_const_val_len_very_small(i32 %iptr_dst) { 435 entry: 436 %dst = inttoptr i32 %iptr_dst to i8* 437 call void @llvm.memset.p0i8.i32(i8* %dst, i8 10, i32 2, i32 1, i1 false) 438 ret void 439 } 440 ; CHECK-LABEL: test_memset_const_val_len_very_small 441 ; CHECK: mov WORD PTR [{{.*}}],0xa0a 442 ; CHECK-NOT: mov 443 ; OM1-LABEL: test_memset_const_val_len_very_small 444 ; OM1: call {{.*}} R_{{.*}} memset 445 ; ARM32-LABEL: test_memset_const_val_len_very_small 446 ; ARM32: uxtb 447 ; ARM32: bl {{.*}} memset 448 ; MIPS32-LABEL: test_memset_const_val_len_very_small 449 ; MIPS32: jal {{.*}} memset 450 451 define internal void @test_memset_const_val_len_3(i32 %iptr_dst) { 452 entry: 453 %dst = inttoptr i32 %iptr_dst to i8* 454 call void @llvm.memset.p0i8.i32(i8* %dst, i8 16, i32 3, i32 1, i1 false) 455 ret void 456 } 457 ; CHECK-LABEL: test_memset_const_val_len_3 458 ; CHECK: mov WORD PTR [{{.*}}],0x1010 459 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x2],0x10 460 ; CHECK-NOT: mov 461 ; OM1-LABEL: test_memset_const_val_len_3 462 ; OM1: call {{.*}} R_{{.*}} memset 463 ; ARM32-LABEL: test_memset_const_val_len_3 464 ; ARM32: uxtb 465 ; ARM32: bl {{.*}} memset 466 ; MIPS32-LABEL: test_memset_const_val_len_3 467 ; MIPS32: jal {{.*}} memset 468 469 define internal void @test_memset_const_val_len_mid(i32 %iptr_dst) { 470 entry: 471 %dst = inttoptr i32 %iptr_dst to i8* 472 call void @llvm.memset.p0i8.i32(i8* %dst, i8 32, i32 9, i32 1, i1 false) 473 ret void 474 } 475 ; CHECK-LABEL: test_memset_const_val_len_mid 476 ; CHECK: mov DWORD PTR [{{.*}}+0x4],0x20202020 477 ; CHECK: mov DWORD PTR [{{.*}}],0x20202020 478 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],0x20 479 ; CHECK-NOT: mov 480 ; OM1-LABEL: test_memset_const_val_len_mid 481 ; OM1: call {{.*}} R_{{.*}} memset 482 ; ARM32-LABEL: test_memset_const_val_len_mid 483 ; ARM32: uxtb 484 ; ARM32: bl {{.*}} memset 485 ; MIPS32-LABEL: test_memset_const_val_len_mid 486 ; MIPS32: jal {{.*}} memset 487 488 ; Same as above, but with a negative value. 489 define internal void @test_memset_const_neg_val_len_mid(i32 %iptr_dst) { 490 entry: 491 %dst = inttoptr i32 %iptr_dst to i8* 492 call void @llvm.memset.p0i8.i32(i8* %dst, i8 -128, i32 9, i32 1, i1 false) 493 ret void 494 } 495 ; CHECK-LABEL: test_memset_const_neg_val_len_mid 496 ; CHECK: mov DWORD PTR [{{.*}}+0x4],0x80808080 497 ; CHECK: mov DWORD PTR [{{.*}}],0x80808080 498 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x8],0x80 499 ; CHECK-NOT: mov 500 ; OM1-LABEL: test_memset_const_neg_val_len_mid 501 ; OM1: call {{.*}} R_{{.*}} memset 502 ; ARM32-LABEL: test_memset_const_neg_val_len_mid 503 ; ARM32: uxtb 504 ; ARM32: bl {{.*}} memset 505 ; MIPS32-LABEL: test_memset_const_neg_val_len_mid 506 ; MIPS32: jal {{.*}} memset 507 508 define internal void @test_memset_zero_const_len_small(i32 %iptr_dst) { 509 entry: 510 %dst = inttoptr i32 %iptr_dst to i8* 511 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 12, i32 1, i1 false) 512 ret void 513 } 514 ; CHECK-LABEL: test_memset_zero_const_len_small 515 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]] 516 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[ZERO]] 517 ; CHECK-NEXT: mov DWORD PTR [{{.*}}+0x8],0x0 518 ; CHECK-NOT: mov 519 ; OM1-LABEL: test_memset_zero_const_len_small 520 ; OM1: call {{.*}} R_{{.*}} memset 521 ; ARM32-LABEL: test_memset_zero_const_len_small 522 ; ARM32: uxtb 523 ; ARM32: bl {{.*}} memset 524 ; MIPS32-LABEL: test_memset_zero_const_len_small 525 ; MIPS32: jal {{.*}} memset 526 527 define internal void @test_memset_zero_const_len_small_overlap(i32 %iptr_dst) { 528 entry: 529 %dst = inttoptr i32 %iptr_dst to i8* 530 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 15, i32 1, i1 false) 531 ret void 532 } 533 ; CHECK-LABEL: test_memset_zero_const_len_small_overlap 534 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]] 535 ; CHECK-NEXT: movq QWORD PTR [{{.*}}],[[ZERO]] 536 ; CHECK-NEXT: movq QWORD PTR [{{.*}}+0x7],[[ZERO]] 537 ; CHECK-NOT: mov 538 ; OM1-LABEL: test_memset_zero_const_len_small_overlap 539 ; OM1: call {{.*}} R_{{.*}} memset 540 ; ARM32-LABEL: test_memset_zero_const_len_small_overlap 541 ; ARM32: uxtb 542 ; ARM32: bl {{.*}} memset 543 ; MIPS32-LABEL: test_memset_zero_const_len_small_overlap 544 ; MIPS32: jal {{.*}} memset 545 546 define internal void @test_memset_zero_const_len_big_overlap(i32 %iptr_dst) { 547 entry: 548 %dst = inttoptr i32 %iptr_dst to i8* 549 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 30, i32 1, i1 false) 550 ret void 551 } 552 ; CHECK-LABEL: test_memset_zero_const_len_big_overlap 553 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]] 554 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[ZERO]] 555 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0xe],[[ZERO]] 556 ; CHECK-NOT: mov 557 ; OM1-LABEL: test_memset_zero_const_len_big_overlap 558 ; OM1: call {{.*}} R_{{.*}} memset 559 ; ARM32-LABEL: test_memset_zero_const_len_big_overlap 560 ; ARM32: uxtb 561 ; ARM32: bl {{.*}} memset 562 ; MIPS32-LABEL: test_memset_zero_const_len_big_overlap 563 ; MIPS32: jal {{.*}} memset 564 565 define internal void @test_memset_zero_const_len_large(i32 %iptr_dst) { 566 entry: 567 %dst = inttoptr i32 %iptr_dst to i8* 568 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 33, i32 1, i1 false) 569 ret void 570 } 571 ; CHECK-LABEL: test_memset_zero_const_len_large 572 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]] 573 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[ZERO]] 574 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[ZERO]] 575 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],0x0 576 ; CHECK-NOT: mov 577 ; OM1-LABEL: test_memset_zero_const_len_large 578 ; OM1: call {{.*}} R_{{.*}} memset 579 ; ARM32-LABEL: test_memset_zero_const_len_large 580 ; ARM32: uxtb 581 ; ARM32: bl {{.*}} memset 582 ; MIPS32-LABEL: test_memset_zero_const_len_large 583 ; MIPS32: jal {{.*}} memset 584
