1 /* 2 * Copyright (C) 2006 Michael Brown <mbrown (at) fensystems.co.uk>. 3 * 4 * Based in part on pci.c from Etherboot 5.4, by Ken Yap and David 5 * Munro, in turn based on the Linux kernel's PCI implementation. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of the 10 * License, or any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 FILE_LICENCE ( GPL2_OR_LATER ); 23 24 #include <stdint.h> 25 #include <stdlib.h> 26 #include <stdio.h> 27 #include <string.h> 28 #include <errno.h> 29 #include <gpxe/tables.h> 30 #include <gpxe/device.h> 31 #include <gpxe/pci.h> 32 33 /** @file 34 * 35 * PCI bus 36 * 37 */ 38 39 static void pcibus_remove ( struct root_device *rootdev ); 40 41 /** 42 * Read PCI BAR 43 * 44 * @v pci PCI device 45 * @v reg PCI register number 46 * @ret bar Base address register 47 * 48 * Reads the specified PCI base address register, including the flags 49 * portion. 64-bit BARs will be handled automatically. If the value 50 * of the 64-bit BAR exceeds the size of an unsigned long (i.e. if the 51 * high dword is non-zero on a 32-bit platform), then the value 52 * returned will be zero plus the flags for a 64-bit BAR. Unreachable 53 * 64-bit BARs are therefore returned as uninitialised 64-bit BARs. 54 */ 55 static unsigned long pci_bar ( struct pci_device *pci, unsigned int reg ) { 56 uint32_t low; 57 uint32_t high; 58 59 pci_read_config_dword ( pci, reg, &low ); 60 if ( ( low & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK) ) 61 == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64) ){ 62 pci_read_config_dword ( pci, reg + 4, &high ); 63 if ( high ) { 64 if ( sizeof ( unsigned long ) > sizeof ( uint32_t ) ) { 65 return ( ( ( uint64_t ) high << 32 ) | low ); 66 } else { 67 DBG ( "Unhandled 64-bit BAR %08x%08x\n", 68 high, low ); 69 return PCI_BASE_ADDRESS_MEM_TYPE_64; 70 } 71 } 72 } 73 return low; 74 } 75 76 /** 77 * Find the start of a PCI BAR 78 * 79 * @v pci PCI device 80 * @v reg PCI register number 81 * @ret start BAR start address 82 * 83 * Reads the specified PCI base address register, and returns the 84 * address portion of the BAR (i.e. without the flags). 85 * 86 * If the address exceeds the size of an unsigned long (i.e. if a 87 * 64-bit BAR has a non-zero high dword on a 32-bit machine), the 88 * return value will be zero. 89 */ 90 unsigned long pci_bar_start ( struct pci_device *pci, unsigned int reg ) { 91 unsigned long bar; 92 93 bar = pci_bar ( pci, reg ); 94 if ( (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY ){ 95 return ( bar & PCI_BASE_ADDRESS_MEM_MASK ); 96 } else { 97 return ( bar & PCI_BASE_ADDRESS_IO_MASK ); 98 } 99 } 100 101 /** 102 * Read membase and ioaddr for a PCI device 103 * 104 * @v pci PCI device 105 * 106 * This scans through all PCI BARs on the specified device. The first 107 * valid memory BAR is recorded as pci_device::membase, and the first 108 * valid IO BAR is recorded as pci_device::ioaddr. 109 * 110 * 64-bit BARs are handled automatically. On a 32-bit platform, if a 111 * 64-bit BAR has a non-zero high dword, it will be regarded as 112 * invalid. 113 */ 114 static void pci_read_bases ( struct pci_device *pci ) { 115 unsigned long bar; 116 int reg; 117 118 for ( reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4 ) { 119 bar = pci_bar ( pci, reg ); 120 if ( bar & PCI_BASE_ADDRESS_SPACE_IO ) { 121 if ( ! pci->ioaddr ) 122 pci->ioaddr = 123 ( bar & PCI_BASE_ADDRESS_IO_MASK ); 124 } else { 125 if ( ! pci->membase ) 126 pci->membase = 127 ( bar & PCI_BASE_ADDRESS_MEM_MASK ); 128 /* Skip next BAR if 64-bit */ 129 if ( bar & PCI_BASE_ADDRESS_MEM_TYPE_64 ) 130 reg += 4; 131 } 132 } 133 } 134 135 /** 136 * Enable PCI device 137 * 138 * @v pci PCI device 139 * 140 * Set device to be a busmaster in case BIOS neglected to do so. Also 141 * adjust PCI latency timer to a reasonable value, 32. 142 */ 143 void adjust_pci_device ( struct pci_device *pci ) { 144 unsigned short new_command, pci_command; 145 unsigned char pci_latency; 146 147 pci_read_config_word ( pci, PCI_COMMAND, &pci_command ); 148 new_command = ( pci_command | PCI_COMMAND_MASTER | 149 PCI_COMMAND_MEM | PCI_COMMAND_IO ); 150 if ( pci_command != new_command ) { 151 DBG ( "PCI BIOS has not enabled device %02x:%02x.%x! " 152 "Updating PCI command %04x->%04x\n", pci->bus, 153 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ), 154 pci_command, new_command ); 155 pci_write_config_word ( pci, PCI_COMMAND, new_command ); 156 } 157 158 pci_read_config_byte ( pci, PCI_LATENCY_TIMER, &pci_latency); 159 if ( pci_latency < 32 ) { 160 DBG ( "PCI device %02x:%02x.%x latency timer is unreasonably " 161 "low at %d. Setting to 32.\n", pci->bus, 162 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ), 163 pci_latency ); 164 pci_write_config_byte ( pci, PCI_LATENCY_TIMER, 32); 165 } 166 } 167 168 /** 169 * Probe a PCI device 170 * 171 * @v pci PCI device 172 * @ret rc Return status code 173 * 174 * Searches for a driver for the PCI device. If a driver is found, 175 * its probe() routine is called. 176 */ 177 static int pci_probe ( struct pci_device *pci ) { 178 struct pci_driver *driver; 179 struct pci_device_id *id; 180 unsigned int i; 181 int rc; 182 183 DBG ( "Adding PCI device %02x:%02x.%x (%04x:%04x mem %lx io %lx " 184 "irq %d)\n", pci->bus, PCI_SLOT ( pci->devfn ), 185 PCI_FUNC ( pci->devfn ), pci->vendor, pci->device, 186 pci->membase, pci->ioaddr, pci->irq ); 187 188 for_each_table_entry ( driver, PCI_DRIVERS ) { 189 for ( i = 0 ; i < driver->id_count ; i++ ) { 190 id = &driver->ids[i]; 191 if ( ( id->vendor != PCI_ANY_ID ) && 192 ( id->vendor != pci->vendor ) ) 193 continue; 194 if ( ( id->device != PCI_ANY_ID ) && 195 ( id->device != pci->device ) ) 196 continue; 197 pci->driver = driver; 198 pci->driver_name = id->name; 199 DBG ( "...using driver %s\n", pci->driver_name ); 200 if ( ( rc = driver->probe ( pci, id ) ) != 0 ) { 201 DBG ( "......probe failed\n" ); 202 continue; 203 } 204 return 0; 205 } 206 } 207 208 DBG ( "...no driver found\n" ); 209 return -ENOTTY; 210 } 211 212 /** 213 * Remove a PCI device 214 * 215 * @v pci PCI device 216 */ 217 static void pci_remove ( struct pci_device *pci ) { 218 pci->driver->remove ( pci ); 219 DBG ( "Removed PCI device %02x:%02x.%x\n", pci->bus, 220 PCI_SLOT ( pci->devfn ), PCI_FUNC ( pci->devfn ) ); 221 } 222 223 /** 224 * Probe PCI root bus 225 * 226 * @v rootdev PCI bus root device 227 * 228 * Scans the PCI bus for devices and registers all devices it can 229 * find. 230 */ 231 static int pcibus_probe ( struct root_device *rootdev ) { 232 struct pci_device *pci = NULL; 233 unsigned int max_bus; 234 unsigned int bus; 235 unsigned int devfn; 236 uint8_t hdrtype = 0; 237 uint32_t tmp; 238 int rc; 239 240 max_bus = pci_max_bus(); 241 for ( bus = 0 ; bus <= max_bus ; bus++ ) { 242 for ( devfn = 0 ; devfn <= 0xff ; devfn++ ) { 243 244 /* Allocate struct pci_device */ 245 if ( ! pci ) 246 pci = malloc ( sizeof ( *pci ) ); 247 if ( ! pci ) { 248 rc = -ENOMEM; 249 goto err; 250 } 251 memset ( pci, 0, sizeof ( *pci ) ); 252 pci->bus = bus; 253 pci->devfn = devfn; 254 255 /* Skip all but the first function on 256 * non-multifunction cards 257 */ 258 if ( PCI_FUNC ( devfn ) == 0 ) { 259 pci_read_config_byte ( pci, PCI_HEADER_TYPE, 260 &hdrtype ); 261 } else if ( ! ( hdrtype & 0x80 ) ) { 262 continue; 263 } 264 265 /* Check for physical device presence */ 266 pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp ); 267 if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) ) 268 continue; 269 270 /* Populate struct pci_device */ 271 pci->vendor = ( tmp & 0xffff ); 272 pci->device = ( tmp >> 16 ); 273 pci_read_config_dword ( pci, PCI_REVISION, &tmp ); 274 pci->class = ( tmp >> 8 ); 275 pci_read_config_byte ( pci, PCI_INTERRUPT_LINE, 276 &pci->irq ); 277 pci_read_bases ( pci ); 278 279 /* Add to device hierarchy */ 280 snprintf ( pci->dev.name, sizeof ( pci->dev.name ), 281 "PCI%02x:%02x.%x", bus, 282 PCI_SLOT ( devfn ), PCI_FUNC ( devfn ) ); 283 pci->dev.desc.bus_type = BUS_TYPE_PCI; 284 pci->dev.desc.location = PCI_BUSDEVFN (bus, devfn); 285 pci->dev.desc.vendor = pci->vendor; 286 pci->dev.desc.device = pci->device; 287 pci->dev.desc.class = pci->class; 288 pci->dev.desc.ioaddr = pci->ioaddr; 289 pci->dev.desc.irq = pci->irq; 290 pci->dev.parent = &rootdev->dev; 291 list_add ( &pci->dev.siblings, &rootdev->dev.children); 292 INIT_LIST_HEAD ( &pci->dev.children ); 293 294 /* Look for a driver */ 295 if ( pci_probe ( pci ) == 0 ) { 296 /* pcidev registered, we can drop our ref */ 297 pci = NULL; 298 } else { 299 /* Not registered; re-use struct pci_device */ 300 list_del ( &pci->dev.siblings ); 301 } 302 } 303 } 304 305 free ( pci ); 306 return 0; 307 308 err: 309 free ( pci ); 310 pcibus_remove ( rootdev ); 311 return rc; 312 } 313 314 /** 315 * Remove PCI root bus 316 * 317 * @v rootdev PCI bus root device 318 */ 319 static void pcibus_remove ( struct root_device *rootdev ) { 320 struct pci_device *pci; 321 struct pci_device *tmp; 322 323 list_for_each_entry_safe ( pci, tmp, &rootdev->dev.children, 324 dev.siblings ) { 325 pci_remove ( pci ); 326 list_del ( &pci->dev.siblings ); 327 free ( pci ); 328 } 329 } 330 331 /** PCI bus root device driver */ 332 static struct root_driver pci_root_driver = { 333 .probe = pcibus_probe, 334 .remove = pcibus_remove, 335 }; 336 337 /** PCI bus root device */ 338 struct root_device pci_root_device __root_device = { 339 .dev = { .name = "PCI" }, 340 .driver = &pci_root_driver, 341 }; 342
