1 /* Copyright 2017 The TensorFlow Authors. All Rights Reserved. 2 3 Licensed under the Apache License, Version 2.0 (the "License"); 4 you may not use this file except in compliance with the License. 5 You may obtain a copy of the License at 6 7 http://www.apache.org/licenses/LICENSE-2.0 8 9 Unless required by applicable law or agreed to in writing, software 10 distributed under the License is distributed on an "AS IS" BASIS, 11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 See the License for the specific language governing permissions and 13 limitations under the License. 14 ==============================================================================*/ 15 16 #if GOOGLE_CUDA 17 18 #define EIGEN_USE_GPU 19 20 #include "tensorflow/contrib/reduce_slice_ops/kernels/reduce_slice_ops.h" 21 #include "tensorflow/core/framework/op.h" 22 #include "tensorflow/core/framework/op_kernel.h" 23 #include "tensorflow/core/framework/register_types.h" 24 #include "tensorflow/core/util/cuda_kernel_helper.h" 25 26 namespace tensorflow { 27 28 using GPUDevice = Eigen::GpuDevice; 29 30 namespace functor { 31 32 #define GPUReduceSliceFunctorReduceop(reduceop, beginning) \ 33 template <typename T, typename Index> \ 34 __global__ void ReduceSliceDeviceKernel##reduceop( \ 35 Cuda3DLaunchConfig config, Index indices_width, Index bound, \ 36 const T begin, const Index *indices, const T *input, T *out) { \ 37 CUDA_AXIS_KERNEL_LOOP(x, config.virtual_thread_count.x, X) { \ 38 CUDA_AXIS_KERNEL_LOOP(y, config.virtual_thread_count.y, Y) { \ 39 CUDA_AXIS_KERNEL_LOOP(z, config.virtual_thread_count.z, Z) { \ 40 Index outidx = x * config.virtual_thread_count.y * \ 41 config.virtual_thread_count.z + \ 42 y * config.virtual_thread_count.z + z; \ 43 out[outidx] = begin; \ 44 Index start = indices[y * indices_width]; \ 45 Index end = Min(bound, indices[y * indices_width + 1]); \ 46 for (Index yin = start; yin < end; yin++) { \ 47 Index inidx = x * bound * config.virtual_thread_count.z + \ 48 yin * config.virtual_thread_count.z + z; \ 49 out[outidx] = reduceop(out[outidx], input[inidx]); \ 50 } \ 51 } \ 52 } \ 53 } \ 54 } \ 55 \ 56 template <typename T, typename Index> \ 57 struct ReduceSliceFunctor##reduceop<GPUDevice, T, Index> { \ 58 virtual ~ReduceSliceFunctor##reduceop() {} \ 59 virtual void operator()(OpKernelContext *ctx, const GPUDevice &d, \ 60 Index indices_width, \ 61 typename TTypes<Index, 1>::ConstTensor indices, \ 62 typename TTypes<T, 3>::ConstTensor data, \ 63 typename TTypes<T, 3>::Tensor output) { \ 64 Index bound = data.dimension(1); \ 65 int sizex = output.dimension(0); \ 66 int sizey = output.dimension(1); \ 67 int sizez = output.dimension(2); \ 68 if (sizex * sizey * sizez == 0) { \ 69 return; \ 70 } \ 71 Cuda3DLaunchConfig config = GetCuda3DLaunchConfig( \ 72 sizex, sizey, sizez, d, ReduceSliceDeviceKernel##reduceop<T, Index>, \ 73 0, 0); \ 74 \ 75 ReduceSliceDeviceKernel##reduceop<T, Index> \ 76 <<<config.block_count, config.thread_per_block, 0, d.stream()>>>( \ 77 config, indices_width, bound, beginning<T>(), indices.data(), \ 78 data.data(), output.data()); \ 79 } \ 80 }; 81 82 CALL_ALL_REDUCEOPS(GPUReduceSliceFunctorReduceop) 83 #undef GPUReduceSliceFunctorReduceop 84 85 #define DEFINE_GPU_REDUCEOP_SPECS_INDEX(reduceop, dummy, T) \ 86 template struct ReduceSliceFunctor##reduceop<GPUDevice, T, int32>; \ 87 template struct ReduceSliceFunctor##reduceop<GPUDevice, T, int64>; 88 89 #define DEFINE_GPU_SPECS(T) \ 90 CALL_ALL_REDUCEOPS(DEFINE_GPU_REDUCEOP_SPECS_INDEX, T) 91 92 TF_CALL_REAL_NUMBER_TYPES(DEFINE_GPU_SPECS) 93 94 #undef DEFINE_GPU_REDUCEOP_SPECS_INDEX 95 #undef DEFINE_GPU_SPECS 96 97 } // namespace functor 98 } // namespace tensorflow 99 100 #endif 101
