1 /* Copyright 2015 The TensorFlow Authors. All Rights Reserved. 2 3 Licensed under the Apache License, Version 2.0 (the "License"); 4 you may not use this file except in compliance with the License. 5 You may obtain a copy of the License at 6 7 http://www.apache.org/licenses/LICENSE-2.0 8 9 Unless required by applicable law or agreed to in writing, software 10 distributed under the License is distributed on an "AS IS" BASIS, 11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 See the License for the specific language governing permissions and 13 limitations under the License. 14 ==============================================================================*/ 15 16 #if GOOGLE_CUDA 17 18 #define EIGEN_USE_GPU 19 20 #include <stdio.h> 21 #include <iostream> 22 23 #include "tensorflow/core/kernels/avgpooling_op.h" 24 25 #include "tensorflow/core/framework/register_types.h" 26 #include "tensorflow/core/framework/tensor_types.h" 27 #include "tensorflow/core/util/cuda_kernel_helper.h" 28 29 namespace tensorflow { 30 31 typedef Eigen::GpuDevice GPUDevice; 32 33 #define DEFINE_GPU_KERNELS(T) \ 34 template struct functor::SpatialAvgPooling<GPUDevice, T>; 35 36 DEFINE_GPU_KERNELS(Eigen::half) 37 DEFINE_GPU_KERNELS(float) 38 39 #undef DEFINE_GPU_KERNELS 40 41 template <typename dtype> 42 __global__ void AvePoolBackwardNHWC(const int nthreads, 43 const dtype* const top_diff, const int num, 44 const int height, const int width, 45 const int channels, const int pooled_height, 46 const int pooled_width, const int kernel_h, 47 const int kernel_w, const int stride_h, 48 const int stride_w, const int pad_t, 49 const int pad_l, dtype* const bottom_diff) { 50 CUDA_1D_KERNEL_LOOP(index, nthreads) { 51 // find out the local index 52 // find out the local offset 53 const int c = index % channels; 54 const int w = index / channels % width + pad_l; 55 const int h = (index / channels / width) % height + pad_t; 56 const int n = index / channels / width / height; 57 const int phstart = (h < kernel_h) ? 0 : (h - kernel_h) / stride_h + 1; 58 const int phend = min(h / stride_h + 1, pooled_height); 59 const int pwstart = (w < kernel_w) ? 0 : (w - kernel_w) / stride_w + 1; 60 const int pwend = min(w / stride_w + 1, pooled_width); 61 dtype gradient(0); 62 const dtype* const top_diff_slice = 63 top_diff + n * pooled_height * pooled_width * channels + c; 64 for (int ph = phstart; ph < phend; ++ph) { 65 for (int pw = pwstart; pw < pwend; ++pw) { 66 // figure out the pooling size 67 int hstart = ph * stride_h - pad_t; 68 int wstart = pw * stride_w - pad_l; 69 int hend = min(hstart + kernel_h, height); 70 int wend = min(wstart + kernel_w, width); 71 hstart = max(hstart, 0); 72 wstart = max(wstart, 0); 73 int pool_size = (hend - hstart) * (wend - wstart); 74 gradient += top_diff_slice[(ph * pooled_width + pw) * channels] / 75 dtype(pool_size); 76 } 77 } 78 bottom_diff[index] = gradient; 79 } 80 } 81 82 template <typename T> 83 bool RunAvePoolBackwardNHWC(const T* const top_diff, const int num, 84 const int height, const int width, 85 const int channels, const int pooled_height, 86 const int pooled_width, const int kernel_h, 87 const int kernel_w, const int stride_h, 88 const int stride_w, const int pad_t, 89 const int pad_l, T* const bottom_diff, 90 const GPUDevice& d) { 91 int x_size = num * height * width * channels; 92 CudaLaunchConfig config = GetCudaLaunchConfig(x_size, d); 93 AvePoolBackwardNHWC<T> 94 <<<config.block_count, config.thread_per_block, 0, d.stream()>>>( 95 config.virtual_thread_count, top_diff, num, height, width, channels, 96 pooled_height, pooled_width, kernel_h, kernel_w, stride_h, stride_w, 97 pad_t, pad_t, bottom_diff); 98 99 return d.ok(); 100 } 101 102 template bool RunAvePoolBackwardNHWC( 103 const float* const top_diff, const int num, const int height, 104 const int width, const int channels, const int pooled_height, 105 const int pooled_width, const int kernel_h, const int kernel_w, 106 const int stride_h, const int stride_w, const int pad_t, const int pad_l, 107 float* const bottom_diff, const GPUDevice& d); 108 template bool RunAvePoolBackwardNHWC( 109 const Eigen::half* const top_diff, const int num, const int height, 110 const int width, const int channels, const int pooled_height, 111 const int pooled_width, const int kernel_h, const int kernel_w, 112 const int stride_h, const int stride_w, const int pad_t, const int pad_l, 113 Eigen::half* const bottom_diff, const GPUDevice& d); 114 115 } // end namespace tensorflow 116 117 #endif // GOOGLE_CUDA 118
