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      1 /* Copyright 2017 The TensorFlow Authors. All Rights Reserved.
      2 
      3 Licensed under the Apache License, Version 2.0 (the "License");
      4 you may not use this file except in compliance with the License.
      5 You may obtain a copy of the License at
      6 
      7     http://www.apache.org/licenses/LICENSE-2.0
      8 
      9 Unless required by applicable law or agreed to in writing, software
     10 distributed under the License is distributed on an "AS IS" BASIS,
     11 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     12 See the License for the specific language governing permissions and
     13 limitations under the License.
     14 ==============================================================================*/
     15 
     16 #ifndef TENSORFLOW_CORE_KERNELS_TILE_OPS_GPU_IMPL_H_
     17 #define TENSORFLOW_CORE_KERNELS_TILE_OPS_GPU_IMPL_H_
     18 
     19 // Header used to split up compilation of GPU tile ops.  For each type you want
     20 // to have tile ops, create a .cu.cc file containing
     21 //
     22 //   #if GOOGLE_CUDA
     23 //   #include "tensorflow/core/kernels/tile_ops_gpu_impl.h"
     24 //   DEFINE_TILE_OPS(NDIM)
     25 //   #endif  // GOGLE_CUDA
     26 //
     27 // where NDIM is an integer.
     28 //
     29 // NOTE(keveman): Eigen's int8 and string versions don't compile yet with nvcc.
     30 
     31 #ifndef GOOGLE_CUDA
     32 #error "This header must be included inside #ifdef GOOGLE_CUDA"
     33 #endif
     34 
     35 #define EIGEN_USE_GPU
     36 
     37 #include <stdio.h>
     38 #include "tensorflow/core/framework/numeric_types.h"
     39 #include "tensorflow/core/kernels/tile_ops_impl.h"
     40 
     41 #define DEFINE_DIM(T, NDIM)                            \
     42   template struct TileGrad<Eigen::GpuDevice, T, NDIM>; \
     43   template struct ReduceAndReshape<Eigen::GpuDevice, T, NDIM, 1>;
     44 
     45 #define DEFINE_TILE_OPS(NDIM)   \
     46   namespace tensorflow {        \
     47   namespace functor {           \
     48   DEFINE_DIM(int16, NDIM)       \
     49   DEFINE_DIM(int32, NDIM)       \
     50   DEFINE_DIM(int64, NDIM)       \
     51   DEFINE_DIM(Eigen::half, NDIM) \
     52   DEFINE_DIM(float, NDIM)       \
     53   DEFINE_DIM(double, NDIM)      \
     54   DEFINE_DIM(complex64, NDIM)   \
     55   DEFINE_DIM(complex128, NDIM)  \
     56   }                             \
     57   }
     58 
     59 #endif  // TENSORFLOW_CORE_KERNELS_TILE_OPS_GPU_IMPL_H_
     60