1 // Copyright 2013 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #include "src/base/cpu.h" 6 7 #if V8_LIBC_MSVCRT 8 #include <intrin.h> // __cpuid() 9 #endif 10 #if V8_OS_LINUX 11 #include <linux/auxvec.h> // AT_HWCAP 12 #endif 13 #if V8_GLIBC_PREREQ(2, 16) 14 #include <sys/auxv.h> // getauxval() 15 #endif 16 #if V8_OS_QNX 17 #include <sys/syspage.h> // cpuinfo 18 #endif 19 #if V8_OS_LINUX && V8_HOST_ARCH_PPC 20 #include <elf.h> 21 #endif 22 #if V8_OS_AIX 23 #include <sys/systemcfg.h> // _system_configuration 24 #ifndef POWER_8 25 #define POWER_8 0x10000 26 #endif 27 #ifndef POWER_9 28 #define POWER_9 0x20000 29 #endif 30 #endif 31 #if V8_OS_POSIX 32 #include <unistd.h> // sysconf() 33 #endif 34 35 #include <ctype.h> 36 #include <limits.h> 37 #include <stdio.h> 38 #include <stdlib.h> 39 #include <string.h> 40 #include <algorithm> 41 42 #include "src/base/logging.h" 43 #if V8_OS_WIN 44 #include "src/base/win32-headers.h" // NOLINT 45 #endif 46 47 namespace v8 { 48 namespace base { 49 50 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 51 52 // Define __cpuid() for non-MSVC libraries. 53 #if !V8_LIBC_MSVCRT 54 55 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) { 56 // Clear ecx to align with __cpuid() of MSVC: 57 // https://msdn.microsoft.com/en-us/library/hskdteyh.aspx 58 #if defined(__i386__) && defined(__pic__) 59 // Make sure to preserve ebx, which contains the pointer 60 // to the GOT in case we're generating PIC. 61 __asm__ volatile( 62 "mov %%ebx, %%edi\n\t" 63 "cpuid\n\t" 64 "xchg %%edi, %%ebx\n\t" 65 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), 66 "=d"(cpu_info[3]) 67 : "a"(info_type), "c"(0)); 68 #else 69 __asm__ volatile("cpuid \n\t" 70 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), 71 "=d"(cpu_info[3]) 72 : "a"(info_type), "c"(0)); 73 #endif // defined(__i386__) && defined(__pic__) 74 } 75 76 #endif // !V8_LIBC_MSVCRT 77 78 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \ 79 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 80 81 #if V8_OS_LINUX 82 83 #if V8_HOST_ARCH_ARM 84 85 // See <uapi/asm/hwcap.h> kernel header. 86 /* 87 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP 88 */ 89 #define HWCAP_SWP (1 << 0) 90 #define HWCAP_HALF (1 << 1) 91 #define HWCAP_THUMB (1 << 2) 92 #define HWCAP_26BIT (1 << 3) /* Play it safe */ 93 #define HWCAP_FAST_MULT (1 << 4) 94 #define HWCAP_FPA (1 << 5) 95 #define HWCAP_VFP (1 << 6) 96 #define HWCAP_EDSP (1 << 7) 97 #define HWCAP_JAVA (1 << 8) 98 #define HWCAP_IWMMXT (1 << 9) 99 #define HWCAP_CRUNCH (1 << 10) 100 #define HWCAP_THUMBEE (1 << 11) 101 #define HWCAP_NEON (1 << 12) 102 #define HWCAP_VFPv3 (1 << 13) 103 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */ 104 #define HWCAP_TLS (1 << 15) 105 #define HWCAP_VFPv4 (1 << 16) 106 #define HWCAP_IDIVA (1 << 17) 107 #define HWCAP_IDIVT (1 << 18) 108 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ 109 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 110 #define HWCAP_LPAE (1 << 20) 111 112 static uint32_t ReadELFHWCaps() { 113 uint32_t result = 0; 114 #if V8_GLIBC_PREREQ(2, 16) 115 result = static_cast<uint32_t>(getauxval(AT_HWCAP)); 116 #else 117 // Read the ELF HWCAP flags by parsing /proc/self/auxv. 118 FILE* fp = fopen("/proc/self/auxv", "r"); 119 if (fp != NULL) { 120 struct { uint32_t tag; uint32_t value; } entry; 121 for (;;) { 122 size_t n = fread(&entry, sizeof(entry), 1, fp); 123 if (n == 0 || (entry.tag == 0 && entry.value == 0)) { 124 break; 125 } 126 if (entry.tag == AT_HWCAP) { 127 result = entry.value; 128 break; 129 } 130 } 131 fclose(fp); 132 } 133 #endif 134 return result; 135 } 136 137 #endif // V8_HOST_ARCH_ARM 138 139 #if V8_HOST_ARCH_MIPS 140 int __detect_fp64_mode(void) { 141 double result = 0; 142 // Bit representation of (double)1 is 0x3FF0000000000000. 143 __asm__ volatile( 144 ".set push\n\t" 145 ".set noreorder\n\t" 146 ".set oddspreg\n\t" 147 "lui $t0, 0x3FF0\n\t" 148 "ldc1 $f0, %0\n\t" 149 "mtc1 $t0, $f1\n\t" 150 "sdc1 $f0, %0\n\t" 151 ".set pop\n\t" 152 : "+m"(result) 153 : 154 : "t0", "$f0", "$f1", "memory"); 155 156 return !(result == 1); 157 } 158 159 160 int __detect_mips_arch_revision(void) { 161 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips 162 // kernel. 163 uint32_t result = 0; 164 __asm__ volatile( 165 "move $v0, $zero\n\t" 166 // Encoding for "addi $v0, $v0, 1" on non-r6, 167 // which is encoding for "bovc $v0, %v0, 1" on r6. 168 // Use machine code directly to avoid compilation errors with different 169 // toolchains and maintain compatibility. 170 ".word 0x20420001\n\t" 171 "sw $v0, %0\n\t" 172 : "=m"(result) 173 : 174 : "v0", "memory"); 175 // Result is 0 on r6 architectures, 1 on other architecture revisions. 176 // Fall-back to the least common denominator which is mips32 revision 1. 177 return result ? 1 : 6; 178 } 179 #endif 180 181 // Extract the information exposed by the kernel via /proc/cpuinfo. 182 class CPUInfo final { 183 public: 184 CPUInfo() : datalen_(0) { 185 // Get the size of the cpuinfo file by reading it until the end. This is 186 // required because files under /proc do not always return a valid size 187 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed. 188 static const char PATHNAME[] = "/proc/cpuinfo"; 189 FILE* fp = fopen(PATHNAME, "r"); 190 if (fp != NULL) { 191 for (;;) { 192 char buffer[256]; 193 size_t n = fread(buffer, 1, sizeof(buffer), fp); 194 if (n == 0) { 195 break; 196 } 197 datalen_ += n; 198 } 199 fclose(fp); 200 } 201 202 // Read the contents of the cpuinfo file. 203 data_ = new char[datalen_ + 1]; 204 fp = fopen(PATHNAME, "r"); 205 if (fp != NULL) { 206 for (size_t offset = 0; offset < datalen_; ) { 207 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp); 208 if (n == 0) { 209 break; 210 } 211 offset += n; 212 } 213 fclose(fp); 214 } 215 216 // Zero-terminate the data. 217 data_[datalen_] = '\0'; 218 } 219 220 ~CPUInfo() { 221 delete[] data_; 222 } 223 224 // Extract the content of a the first occurence of a given field in 225 // the content of the cpuinfo file and return it as a heap-allocated 226 // string that must be freed by the caller using delete[]. 227 // Return NULL if not found. 228 char* ExtractField(const char* field) const { 229 DCHECK(field != NULL); 230 231 // Look for first field occurence, and ensure it starts the line. 232 size_t fieldlen = strlen(field); 233 char* p = data_; 234 for (;;) { 235 p = strstr(p, field); 236 if (p == NULL) { 237 return NULL; 238 } 239 if (p == data_ || p[-1] == '\n') { 240 break; 241 } 242 p += fieldlen; 243 } 244 245 // Skip to the first colon followed by a space. 246 p = strchr(p + fieldlen, ':'); 247 if (p == NULL || !isspace(p[1])) { 248 return NULL; 249 } 250 p += 2; 251 252 // Find the end of the line. 253 char* q = strchr(p, '\n'); 254 if (q == NULL) { 255 q = data_ + datalen_; 256 } 257 258 // Copy the line into a heap-allocated buffer. 259 size_t len = q - p; 260 char* result = new char[len + 1]; 261 if (result != NULL) { 262 memcpy(result, p, len); 263 result[len] = '\0'; 264 } 265 return result; 266 } 267 268 private: 269 char* data_; 270 size_t datalen_; 271 }; 272 273 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 274 275 // Checks that a space-separated list of items contains one given 'item'. 276 static bool HasListItem(const char* list, const char* item) { 277 ssize_t item_len = strlen(item); 278 const char* p = list; 279 if (p != NULL) { 280 while (*p != '\0') { 281 // Skip whitespace. 282 while (isspace(*p)) ++p; 283 284 // Find end of current list item. 285 const char* q = p; 286 while (*q != '\0' && !isspace(*q)) ++q; 287 288 if (item_len == q - p && memcmp(p, item, item_len) == 0) { 289 return true; 290 } 291 292 // Skip to next item. 293 p = q; 294 } 295 } 296 return false; 297 } 298 299 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 300 301 #endif // V8_OS_LINUX 302 303 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 304 305 CPU::CPU() 306 : stepping_(0), 307 model_(0), 308 ext_model_(0), 309 family_(0), 310 ext_family_(0), 311 type_(0), 312 implementer_(0), 313 architecture_(0), 314 variant_(-1), 315 part_(0), 316 icache_line_size_(UNKNOWN_CACHE_LINE_SIZE), 317 dcache_line_size_(UNKNOWN_CACHE_LINE_SIZE), 318 has_fpu_(false), 319 has_cmov_(false), 320 has_sahf_(false), 321 has_mmx_(false), 322 has_sse_(false), 323 has_sse2_(false), 324 has_sse3_(false), 325 has_ssse3_(false), 326 has_sse41_(false), 327 has_sse42_(false), 328 is_atom_(false), 329 has_osxsave_(false), 330 has_avx_(false), 331 has_fma3_(false), 332 has_bmi1_(false), 333 has_bmi2_(false), 334 has_lzcnt_(false), 335 has_popcnt_(false), 336 has_idiva_(false), 337 has_neon_(false), 338 has_thumb2_(false), 339 has_vfp_(false), 340 has_vfp3_(false), 341 has_vfp3_d32_(false), 342 is_fp64_mode_(false), 343 has_non_stop_time_stamp_counter_(false) { 344 memcpy(vendor_, "Unknown", 8); 345 #if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64 346 int cpu_info[4]; 347 348 // __cpuid with an InfoType argument of 0 returns the number of 349 // valid Ids in CPUInfo[0] and the CPU identification string in 350 // the other three array elements. The CPU identification string is 351 // not in linear order. The code below arranges the information 352 // in a human readable form. The human readable order is CPUInfo[1] | 353 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped 354 // before using memcpy to copy these three array elements to cpu_string. 355 __cpuid(cpu_info, 0); 356 unsigned num_ids = cpu_info[0]; 357 std::swap(cpu_info[2], cpu_info[3]); 358 memcpy(vendor_, cpu_info + 1, 12); 359 vendor_[12] = '\0'; 360 361 // Interpret CPU feature information. 362 if (num_ids > 0) { 363 __cpuid(cpu_info, 1); 364 stepping_ = cpu_info[0] & 0xf; 365 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0); 366 family_ = (cpu_info[0] >> 8) & 0xf; 367 type_ = (cpu_info[0] >> 12) & 0x3; 368 ext_model_ = (cpu_info[0] >> 16) & 0xf; 369 ext_family_ = (cpu_info[0] >> 20) & 0xff; 370 has_fpu_ = (cpu_info[3] & 0x00000001) != 0; 371 has_cmov_ = (cpu_info[3] & 0x00008000) != 0; 372 has_mmx_ = (cpu_info[3] & 0x00800000) != 0; 373 has_sse_ = (cpu_info[3] & 0x02000000) != 0; 374 has_sse2_ = (cpu_info[3] & 0x04000000) != 0; 375 has_sse3_ = (cpu_info[2] & 0x00000001) != 0; 376 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0; 377 has_sse41_ = (cpu_info[2] & 0x00080000) != 0; 378 has_sse42_ = (cpu_info[2] & 0x00100000) != 0; 379 has_popcnt_ = (cpu_info[2] & 0x00800000) != 0; 380 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0; 381 has_avx_ = (cpu_info[2] & 0x10000000) != 0; 382 has_fma3_ = (cpu_info[2] & 0x00001000) != 0; 383 384 if (family_ == 0x6) { 385 switch (model_) { 386 case 0x1c: // SLT 387 case 0x26: 388 case 0x36: 389 case 0x27: 390 case 0x35: 391 case 0x37: // SLM 392 case 0x4a: 393 case 0x4d: 394 case 0x4c: // AMT 395 case 0x6e: 396 is_atom_ = true; 397 } 398 } 399 } 400 401 // There are separate feature flags for VEX-encoded GPR instructions. 402 if (num_ids >= 7) { 403 __cpuid(cpu_info, 7); 404 has_bmi1_ = (cpu_info[1] & 0x00000008) != 0; 405 has_bmi2_ = (cpu_info[1] & 0x00000100) != 0; 406 } 407 408 // Query extended IDs. 409 __cpuid(cpu_info, 0x80000000); 410 unsigned num_ext_ids = cpu_info[0]; 411 412 // Interpret extended CPU feature information. 413 if (num_ext_ids > 0x80000000) { 414 __cpuid(cpu_info, 0x80000001); 415 has_lzcnt_ = (cpu_info[2] & 0x00000020) != 0; 416 // SAHF must be probed in long mode. 417 has_sahf_ = (cpu_info[2] & 0x00000001) != 0; 418 } 419 420 // Check if CPU has non stoppable time stamp counter. 421 const unsigned parameter_containing_non_stop_time_stamp_counter = 0x80000007; 422 if (num_ext_ids >= parameter_containing_non_stop_time_stamp_counter) { 423 __cpuid(cpu_info, parameter_containing_non_stop_time_stamp_counter); 424 has_non_stop_time_stamp_counter_ = (cpu_info[3] & (1 << 8)) != 0; 425 } 426 427 #elif V8_HOST_ARCH_ARM 428 429 #if V8_OS_LINUX 430 431 CPUInfo cpu_info; 432 433 // Extract implementor from the "CPU implementer" field. 434 char* implementer = cpu_info.ExtractField("CPU implementer"); 435 if (implementer != NULL) { 436 char* end; 437 implementer_ = strtol(implementer, &end, 0); 438 if (end == implementer) { 439 implementer_ = 0; 440 } 441 delete[] implementer; 442 } 443 444 char* variant = cpu_info.ExtractField("CPU variant"); 445 if (variant != NULL) { 446 char* end; 447 variant_ = strtol(variant, &end, 0); 448 if (end == variant) { 449 variant_ = -1; 450 } 451 delete[] variant; 452 } 453 454 // Extract part number from the "CPU part" field. 455 char* part = cpu_info.ExtractField("CPU part"); 456 if (part != NULL) { 457 char* end; 458 part_ = strtol(part, &end, 0); 459 if (end == part) { 460 part_ = 0; 461 } 462 delete[] part; 463 } 464 465 // Extract architecture from the "CPU Architecture" field. 466 // The list is well-known, unlike the the output of 467 // the 'Processor' field which can vary greatly. 468 // See the definition of the 'proc_arch' array in 469 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in 470 // same file. 471 char* architecture = cpu_info.ExtractField("CPU architecture"); 472 if (architecture != NULL) { 473 char* end; 474 architecture_ = strtol(architecture, &end, 10); 475 if (end == architecture) { 476 // Kernels older than 3.18 report "CPU architecture: AArch64" on ARMv8. 477 if (strcmp(architecture, "AArch64") == 0) { 478 architecture_ = 8; 479 } else { 480 architecture_ = 0; 481 } 482 } 483 delete[] architecture; 484 485 // Unfortunately, it seems that certain ARMv6-based CPUs 486 // report an incorrect architecture number of 7! 487 // 488 // See http://code.google.com/p/android/issues/detail?id=10812 489 // 490 // We try to correct this by looking at the 'elf_platform' 491 // field reported by the 'Processor' field, which is of the 492 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for 493 // an ARMv6-one. For example, the Raspberry Pi is one popular 494 // ARMv6 device that reports architecture 7. 495 if (architecture_ == 7) { 496 char* processor = cpu_info.ExtractField("Processor"); 497 if (HasListItem(processor, "(v6l)")) { 498 architecture_ = 6; 499 } 500 delete[] processor; 501 } 502 503 // elf_platform moved to the model name field in Linux v3.8. 504 if (architecture_ == 7) { 505 char* processor = cpu_info.ExtractField("model name"); 506 if (HasListItem(processor, "(v6l)")) { 507 architecture_ = 6; 508 } 509 delete[] processor; 510 } 511 } 512 513 // Try to extract the list of CPU features from ELF hwcaps. 514 uint32_t hwcaps = ReadELFHWCaps(); 515 if (hwcaps != 0) { 516 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0; 517 has_neon_ = (hwcaps & HWCAP_NEON) != 0; 518 has_vfp_ = (hwcaps & HWCAP_VFP) != 0; 519 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0; 520 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 || 521 (hwcaps & HWCAP_VFPD32) != 0)); 522 } else { 523 // Try to fallback to "Features" CPUInfo field. 524 char* features = cpu_info.ExtractField("Features"); 525 has_idiva_ = HasListItem(features, "idiva"); 526 has_neon_ = HasListItem(features, "neon"); 527 has_thumb2_ = HasListItem(features, "thumb2"); 528 has_vfp_ = HasListItem(features, "vfp"); 529 if (HasListItem(features, "vfpv3d16")) { 530 has_vfp3_ = true; 531 } else if (HasListItem(features, "vfpv3")) { 532 has_vfp3_ = true; 533 has_vfp3_d32_ = true; 534 } 535 delete[] features; 536 } 537 538 // Some old kernels will report vfp not vfpv3. Here we make an attempt 539 // to detect vfpv3 by checking for vfp *and* neon, since neon is only 540 // available on architectures with vfpv3. Checking neon on its own is 541 // not enough as it is possible to have neon without vfp. 542 if (has_vfp_ && has_neon_) { 543 has_vfp3_ = true; 544 } 545 546 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6. 547 if (architecture_ < 7 && has_vfp3_) { 548 architecture_ = 7; 549 } 550 551 // ARMv7 implies Thumb2. 552 if (architecture_ >= 7) { 553 has_thumb2_ = true; 554 } 555 556 // The earliest architecture with Thumb2 is ARMv6T2. 557 if (has_thumb2_ && architecture_ < 6) { 558 architecture_ = 6; 559 } 560 561 // We don't support any FPUs other than VFP. 562 has_fpu_ = has_vfp_; 563 564 #elif V8_OS_QNX 565 566 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags; 567 if (cpu_flags & ARM_CPU_FLAG_V7) { 568 architecture_ = 7; 569 has_thumb2_ = true; 570 } else if (cpu_flags & ARM_CPU_FLAG_V6) { 571 architecture_ = 6; 572 // QNX doesn't say if Thumb2 is available. 573 // Assume false for the architectures older than ARMv7. 574 } 575 DCHECK(architecture_ >= 6); 576 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0; 577 has_vfp_ = has_fpu_; 578 if (cpu_flags & ARM_CPU_FLAG_NEON) { 579 has_neon_ = true; 580 has_vfp3_ = has_vfp_; 581 #ifdef ARM_CPU_FLAG_VFP_D32 582 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0; 583 #endif 584 } 585 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0; 586 587 #endif // V8_OS_LINUX 588 589 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64 590 591 // Simple detection of FPU at runtime for Linux. 592 // It is based on /proc/cpuinfo, which reveals hardware configuration 593 // to user-space applications. According to MIPS (early 2010), no similar 594 // facility is universally available on the MIPS architectures, 595 // so it's up to individual OSes to provide such. 596 CPUInfo cpu_info; 597 char* cpu_model = cpu_info.ExtractField("cpu model"); 598 has_fpu_ = HasListItem(cpu_model, "FPU"); 599 delete[] cpu_model; 600 #ifdef V8_HOST_ARCH_MIPS 601 is_fp64_mode_ = __detect_fp64_mode(); 602 architecture_ = __detect_mips_arch_revision(); 603 #endif 604 605 #elif V8_HOST_ARCH_ARM64 606 607 CPUInfo cpu_info; 608 609 // Extract implementor from the "CPU implementer" field. 610 char* implementer = cpu_info.ExtractField("CPU implementer"); 611 if (implementer != NULL) { 612 char* end; 613 implementer_ = static_cast<int>(strtol(implementer, &end, 0)); 614 if (end == implementer) { 615 implementer_ = 0; 616 } 617 delete[] implementer; 618 } 619 620 char* variant = cpu_info.ExtractField("CPU variant"); 621 if (variant != NULL) { 622 char* end; 623 variant_ = static_cast<int>(strtol(variant, &end, 0)); 624 if (end == variant) { 625 variant_ = -1; 626 } 627 delete[] variant; 628 } 629 630 // Extract part number from the "CPU part" field. 631 char* part = cpu_info.ExtractField("CPU part"); 632 if (part != NULL) { 633 char* end; 634 part_ = static_cast<int>(strtol(part, &end, 0)); 635 if (end == part) { 636 part_ = 0; 637 } 638 delete[] part; 639 } 640 641 #elif V8_HOST_ARCH_PPC 642 643 #ifndef USE_SIMULATOR 644 #if V8_OS_LINUX 645 // Read processor info from /proc/self/auxv. 646 char* auxv_cpu_type = NULL; 647 FILE* fp = fopen("/proc/self/auxv", "r"); 648 if (fp != NULL) { 649 #if V8_TARGET_ARCH_PPC64 650 Elf64_auxv_t entry; 651 #else 652 Elf32_auxv_t entry; 653 #endif 654 for (;;) { 655 size_t n = fread(&entry, sizeof(entry), 1, fp); 656 if (n == 0 || entry.a_type == AT_NULL) { 657 break; 658 } 659 switch (entry.a_type) { 660 case AT_PLATFORM: 661 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val); 662 break; 663 case AT_ICACHEBSIZE: 664 icache_line_size_ = entry.a_un.a_val; 665 break; 666 case AT_DCACHEBSIZE: 667 dcache_line_size_ = entry.a_un.a_val; 668 break; 669 } 670 } 671 fclose(fp); 672 } 673 674 part_ = -1; 675 if (auxv_cpu_type) { 676 if (strcmp(auxv_cpu_type, "power9") == 0) { 677 part_ = PPC_POWER9; 678 } else if (strcmp(auxv_cpu_type, "power8") == 0) { 679 part_ = PPC_POWER8; 680 } else if (strcmp(auxv_cpu_type, "power7") == 0) { 681 part_ = PPC_POWER7; 682 } else if (strcmp(auxv_cpu_type, "power6") == 0) { 683 part_ = PPC_POWER6; 684 } else if (strcmp(auxv_cpu_type, "power5") == 0) { 685 part_ = PPC_POWER5; 686 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) { 687 part_ = PPC_G5; 688 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) { 689 part_ = PPC_G4; 690 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) { 691 part_ = PPC_PA6T; 692 } 693 } 694 695 #elif V8_OS_AIX 696 switch (_system_configuration.implementation) { 697 case POWER_9: 698 part_ = PPC_POWER9; 699 break; 700 case POWER_8: 701 part_ = PPC_POWER8; 702 break; 703 case POWER_7: 704 part_ = PPC_POWER7; 705 break; 706 case POWER_6: 707 part_ = PPC_POWER6; 708 break; 709 case POWER_5: 710 part_ = PPC_POWER5; 711 break; 712 } 713 #endif // V8_OS_AIX 714 #endif // !USE_SIMULATOR 715 #endif // V8_HOST_ARCH_PPC 716 } 717 718 } // namespace base 719 } // namespace v8 720
