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      1 // Copyright 2015, VIXL authors
      2 // All rights reserved.
      3 //
      4 // Redistribution and use in source and binary forms, with or without
      5 // modification, are permitted provided that the following conditions are met:
      6 //
      7 //   * Redistributions of source code must retain the above copyright notice,
      8 //     this list of conditions and the following disclaimer.
      9 //   * Redistributions in binary form must reproduce the above copyright notice,
     10 //     this list of conditions and the following disclaimer in the documentation
     11 //     and/or other materials provided with the distribution.
     12 //   * Neither the name of ARM Limited nor the names of its contributors may be
     13 //     used to endorse or promote products derived from this software without
     14 //     specific prior written permission.
     15 //
     16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
     17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
     20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26 
     27 
     28 // ---------------------------------------------------------------------
     29 // This file is auto generated using tools/generate_simulator_traces.py.
     30 //
     31 // PLEASE DO NOT EDIT.
     32 // ---------------------------------------------------------------------
     33 
     34 #ifndef VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_
     35 #define VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_
     36 
     37 const uint32_t kExpected_NEON_fcvtas_S[] = {
     38   0x80000080,
     39   0x7fffff80,
     40   0x7fffffff,
     41   0x00000000,
     42   0x00000000,
     43   0x00000000,
     44   0x00000001,
     45   0x00000001,
     46   0x00000001,
     47   0x00000001,
     48   0x00000001,
     49   0x00000002,
     50   0x0000000a,
     51   0x00000000,
     52   0x7fffffff,
     53   0x00000000,
     54   0x00000000,
     55   0x00000000,
     56   0x00000000,
     57   0x00000000,
     58   0x00000000,
     59   0x00000000,
     60   0x00000000,
     61   0x00000000,
     62   0x00000000,
     63   0xffffffff,
     64   0xffffffff,
     65   0xffffffff,
     66   0xffffffff,
     67   0xffffffff,
     68   0xfffffffe,
     69   0xfffffff6,
     70   0x00000000,
     71   0x80000000,
     72   0x00000000,
     73   0x00000000,
     74   0x00000000,
     75   0x00000000,
     76   0x00000000,
     77   0x00000000,
     78   0x00000000,
     79   0x00800000,
     80   0x00800001,
     81   0x00800002,
     82   0x00800003,
     83   0x00f65432,
     84   0x00fffffc,
     85   0x00fffffd,
     86   0x00fffffe,
     87   0x00ffffff,
     88   0x00400000,
     89   0x00400001,
     90   0x00400001,
     91   0x00400002,
     92   0x007b2a19,
     93   0x007ffffe,
     94   0x007fffff,
     95   0x007fffff,
     96   0x00800000,
     97   0x00200000,
     98   0x00200000,
     99   0x00200001,
    100   0x00200001,
    101   0x003d950d,
    102   0x003fffff,
    103   0x003fffff,
    104   0x00400000,
    105   0x00400000,
    106   0xff800000,
    107   0xff7fffff,
    108   0xff7ffffe,
    109   0xff7ffffd,
    110   0xff09abce,
    111   0xff000004,
    112   0xff000003,
    113   0xff000002,
    114   0xff000001,
    115   0xffc00000,
    116   0xffbfffff,
    117   0xffbfffff,
    118   0xffbffffe,
    119   0xff84d5e7,
    120   0xff800002,
    121   0xff800001,
    122   0xff800001,
    123   0xff800000,
    124   0xffe00000,
    125   0xffe00000,
    126   0xffdfffff,
    127   0xffdfffff,
    128   0xffc26af3,
    129   0xffc00001,
    130   0xffc00001,
    131   0xffc00000,
    132   0xffc00000,
    133   0x80000000,
    134   0x80000000,
    135   0x80000000,
    136   0x7fffffff,
    137   0x7fffffff,
    138   0x7fffffff,
    139   0x7fffffff,
    140   0x80000000,
    141   0x80000000,
    142 };
    143 const unsigned kExpectedCount_NEON_fcvtas_S = 104;
    144 
    145 #endif  // VIXL_SIM_FCVTAS_S_TRACE_AARCH64_H_
    146