1 // Copyright 2015, VIXL authors 2 // All rights reserved. 3 // 4 // Redistribution and use in source and binary forms, with or without 5 // modification, are permitted provided that the following conditions are met: 6 // 7 // * Redistributions of source code must retain the above copyright notice, 8 // this list of conditions and the following disclaimer. 9 // * Redistributions in binary form must reproduce the above copyright notice, 10 // this list of conditions and the following disclaimer in the documentation 11 // and/or other materials provided with the distribution. 12 // * Neither the name of ARM Limited nor the names of its contributors may be 13 // used to endorse or promote products derived from this software without 14 // specific prior written permission. 15 // 16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28 // --------------------------------------------------------------------- 29 // This file is auto generated using tools/generate_simulator_traces.py. 30 // 31 // PLEASE DO NOT EDIT. 32 // --------------------------------------------------------------------- 33 34 #ifndef VIXL_SIM_SUQADD_4S_TRACE_AARCH64_H_ 35 #define VIXL_SIM_SUQADD_4S_TRACE_AARCH64_H_ 36 37 const uint32_t kExpected_NEON_suqadd_4S[] = { 38 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x00000000, 39 0x7fffffff, 0x7fffffff, 0x00000000, 0x00000001, 40 0x7fffffff, 0x00000000, 0x00000001, 0x00000002, 41 0x00000000, 0x00000001, 0x00000002, 0x00000020, 42 0x00000001, 0x00000002, 0x00000020, 0x0000007d, 43 0x00000002, 0x00000020, 0x0000007d, 0x0000007e, 44 0x00000020, 0x0000007d, 0x0000007e, 0x0000007f, 45 0x0000007d, 0x0000007e, 0x0000007f, 0x00007ffd, 46 0x0000007e, 0x0000007f, 0x00007ffd, 0x00007ffe, 47 0x0000007f, 0x00007ffd, 0x00007ffe, 0x00007fff, 48 0x00007ffd, 0x00007ffe, 0x00007fff, 0x33333333, 49 0x00007ffe, 0x00007fff, 0x33333333, 0x55555555, 50 0x00007fff, 0x33333333, 0x55555555, 0x7ffffffd, 51 0x33333333, 0x55555555, 0x7ffffffd, 0x7ffffffe, 52 0x55555555, 0x7ffffffd, 0x7ffffffe, 0x7fffffff, 53 0x7ffffffd, 0x7ffffffe, 0x7fffffff, 0x7fffffff, 54 0x7ffffffe, 0x7fffffff, 0x7fffffff, 0x7fffffff, 55 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 56 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 57 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 58 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 59 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 60 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 61 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 62 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 63 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 64 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 65 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 66 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 67 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 68 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff, 69 }; 70 const unsigned kExpectedCount_NEON_suqadd_4S = 31; 71 72 #endif // VIXL_SIM_SUQADD_4S_TRACE_AARCH64_H_ 73
