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      1 // Copyright 2015, VIXL authors
      2 // All rights reserved.
      3 //
      4 // Redistribution and use in source and binary forms, with or without
      5 // modification, are permitted provided that the following conditions are met:
      6 //
      7 //   * Redistributions of source code must retain the above copyright notice,
      8 //     this list of conditions and the following disclaimer.
      9 //   * Redistributions in binary form must reproduce the above copyright notice,
     10 //     this list of conditions and the following disclaimer in the documentation
     11 //     and/or other materials provided with the distribution.
     12 //   * Neither the name of ARM Limited nor the names of its contributors may be
     13 //     used to endorse or promote products derived from this software without
     14 //     specific prior written permission.
     15 //
     16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
     17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
     20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26 
     27 
     28 // ---------------------------------------------------------------------
     29 // This file is auto generated using tools/generate_simulator_traces.py.
     30 //
     31 // PLEASE DO NOT EDIT.
     32 // ---------------------------------------------------------------------
     33 
     34 #ifndef VIXL_SIM_XTN_2S_TRACE_AARCH64_H_
     35 #define VIXL_SIM_XTN_2S_TRACE_AARCH64_H_
     36 
     37 const uint32_t kExpected_NEON_xtn_2S[] = {
     38   0x00000000ffffffff, 0x0000000000000000,
     39   0x0000000000000000, 0x0000000000000001,
     40   0x0000000000000001, 0x0000000000000002,
     41   0x0000000000000002, 0x0000000000000040,
     42   0x0000000000000040, 0x000000000000007d,
     43   0x000000000000007d, 0x000000000000007e,
     44   0x000000000000007e, 0x000000000000007f,
     45   0x000000000000007f, 0x0000000000007ffd,
     46   0x0000000000007ffd, 0x0000000000007ffe,
     47   0x0000000000007ffe, 0x0000000000007fff,
     48   0x0000000000007fff, 0x000000007ffffffd,
     49   0x000000007ffffffd, 0x000000007ffffffe,
     50   0x000000007ffffffe, 0x000000007fffffff,
     51   0x000000007fffffff, 0x0000000033333333,
     52   0x0000000033333333, 0x0000000055555555,
     53   0x0000000055555555, 0x00000000fffffffd,
     54   0x00000000fffffffd, 0x00000000fffffffe,
     55   0x00000000fffffffe, 0x00000000ffffffff,
     56   0x00000000ffffffff, 0x0000000000000000,
     57   0x0000000000000000, 0x0000000000000001,
     58   0x0000000000000001, 0x0000000000000002,
     59   0x0000000000000002, 0x0000000000000003,
     60   0x0000000000000003, 0x00000000aaaaaaaa,
     61   0x00000000aaaaaaaa, 0x00000000cccccccc,
     62   0x00000000cccccccc, 0x0000000080000000,
     63   0x0000000080000000, 0x0000000080000001,
     64   0x0000000080000001, 0x0000000080000002,
     65   0x0000000080000002, 0x0000000080000003,
     66   0x0000000080000003, 0x00000000ffff8000,
     67   0x00000000ffff8000, 0x00000000ffff8001,
     68   0x00000000ffff8001, 0x00000000ffff8002,
     69   0x00000000ffff8002, 0x00000000ffff8003,
     70   0x00000000ffff8003, 0x00000000ffffff80,
     71   0x00000000ffffff80, 0x00000000ffffff81,
     72   0x00000000ffffff81, 0x00000000ffffff82,
     73   0x00000000ffffff82, 0x00000000ffffff83,
     74   0x00000000ffffff83, 0x00000000ffffffc0,
     75   0x00000000ffffffc0, 0x00000000fffffffd,
     76   0x00000000fffffffd, 0x00000000fffffffe,
     77   0x00000000fffffffe, 0x00000000ffffffff,
     78 };
     79 const unsigned kExpectedCount_NEON_xtn_2S = 40;
     80 
     81 #endif  // VIXL_SIM_XTN_2S_TRACE_AARCH64_H_
     82